Lines Matching defs:prediv
17 * M: frequency dividing ratio of pre-divider, set by prediv[5:0].
84 unsigned prediv : 6;
97 unsigned int prediv;
120 .prediv = JH7110_PLL##_idx##_PREDIV_OFFSET, \
152 u32 prediv;
164 .prediv = 8,
170 .prediv = 6,
176 .prediv = 24,
182 .prediv = 4,
188 .prediv = 24,
194 .prediv = 3,
200 .prediv = 12,
206 .prediv = 24,
212 .prediv = 2,
222 .prediv = 12,
228 .prediv = 1,
234 .prediv = 6,
240 .prediv = 3,
250 .prediv = 2,
256 .prediv = 5,
295 regmap_read(regmap, info->offsets.prediv, &val);
296 ret->prediv = (val & JH7110_PLL_PREDIV_MASK) >> JH7110_PLL_PREDIV_SHIFT;
312 * rate = parent * (fbdiv + frac/2^24) / prediv / 2^postdiv1
313 * = (parent * fbdiv + parent * frac / 2^24) / (prediv * 2^postdiv1)
323 rate /= val.prediv << val.postdiv1;
383 regmap_update_bits(priv->regmap, info->offsets.prediv, JH7110_PLL_PREDIV_MASK,
384 (u32)val->prediv << JH7110_PLL_PREDIV_SHIFT);
404 "prediv=%u\n"
408 val.fbdiv, val.frac, val.prediv, val.postdiv1,