clk/samsung/clk-pll.h

54 #define PLL_RATE(_fin, _m, _p, _s, _k, _ks) \
55 	((u64)(_fin) * (BIT(_ks) * (_m) + (_k)) / BIT(_ks) / ((_p) << (_s)))
56 #define PLL_VALID_RATE(_fin, _fout, _m, _p, _s, _k, _ks) ((_fout) + \
57 	BUILD_BUG_ON_ZERO(PLL_RATE(_fin, _m, _p, _s, _k, _ks) != (_fout)))
68 #define PLL_36XX_RATE(_fin, _rate, _m, _p, _s, _k)		\
71 				_m, _p, _s, _k, 16),		\
75 		.kdiv	=	(_k),				\
88 #define PLL_4600_RATE(_fin, _rate, _m, _p, _s, _k, _vsel)	\
91 				_m, _p, _s, _k, 16),		\
95 		.kdiv	=	(_k),				\
99 #define PLL_4650_RATE(_fin, _rate, _m, _p, _s, _k, _mfr, _mrr, _vsel) \
102 				_m, _p, _s, _k, 10),		\
106 		.kdiv	=	(_k),				\