250 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_is_enabled()  local
252 	return readl(refo->ctrl_reg) & REFO_ON;  in roclk_is_enabled()
257 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_enable()  local
259 	writel(REFO_ON | REFO_OE, PIC32_SET(refo->ctrl_reg));  in roclk_enable()
265 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_disable()  local
267 	writel(REFO_ON | REFO_OE, PIC32_CLR(refo->ctrl_reg));  in roclk_disable()
280 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_get_parent()  local
283 	v = (readl(refo->ctrl_reg) >> REFO_SEL_SHIFT) & REFO_SEL_MASK;  in roclk_get_parent()
285 	if (refo->parent_map) {  in roclk_get_parent()
287 			if (refo->parent_map[i] == v)  in roclk_get_parent()
361 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_recalc_rate()  local
365 	v = readl(refo->ctrl_reg);  in roclk_recalc_rate()
369 	v = readl(refo->ctrl_reg + REFO_TRIM_REG);  in roclk_recalc_rate()
438 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_set_parent()  local
443 	if (refo->parent_map)  in roclk_set_parent()
444 		index = refo->parent_map[index];  in roclk_set_parent()
447 	err = readl_poll_timeout(refo->ctrl_reg, v, !(v & REFO_ACTIVE),  in roclk_set_parent()
454 	spin_lock_irqsave(&refo->core->reg_lock, flags);  in roclk_set_parent()
459 	v = readl(refo->ctrl_reg);  in roclk_set_parent()
463 	writel(v, refo->ctrl_reg);  in roclk_set_parent()
465 	spin_unlock_irqrestore(&refo->core->reg_lock, flags);  in roclk_set_parent()
475 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_set_rate_and_parent()  local
487 	err = readl_poll_timeout(refo->ctrl_reg, v,  in roclk_set_rate_and_parent()
495 	spin_lock_irqsave(&refo->core->reg_lock, flags);  in roclk_set_rate_and_parent()
496 	v = readl(refo->ctrl_reg);  in roclk_set_rate_and_parent()
501 	if (refo->parent_map)  in roclk_set_rate_and_parent()
502 		index = refo->parent_map[index];  in roclk_set_rate_and_parent()
510 	writel(v, refo->ctrl_reg);  in roclk_set_rate_and_parent()
513 	v = readl(refo->ctrl_reg + REFO_TRIM_REG);  in roclk_set_rate_and_parent()
516 	writel(v, refo->ctrl_reg + REFO_TRIM_REG);  in roclk_set_rate_and_parent()
519 	writel(REFO_ON | REFO_DIVSW_EN, PIC32_SET(refo->ctrl_reg));  in roclk_set_rate_and_parent()
522 	err = readl_poll_timeout_atomic(refo->ctrl_reg, v, !(v & REFO_DIVSW_EN),  in roclk_set_rate_and_parent()
525 	writel(REFO_ON, PIC32_CLR(refo->ctrl_reg));  in roclk_set_rate_and_parent()
527 	spin_unlock_irqrestore(&refo->core->reg_lock, flags);  in roclk_set_rate_and_parent()
556 	struct pic32_ref_osc *refo;  in pic32_refo_clk_register()  local
559 	refo = devm_kzalloc(core->dev, sizeof(*refo), GFP_KERNEL);  in pic32_refo_clk_register()
560 	if (!refo)  in pic32_refo_clk_register()
563 	refo->core = core;  in pic32_refo_clk_register()
564 	refo->hw.init = &data->init_data;  in pic32_refo_clk_register()
565 	refo->ctrl_reg = data->ctrl_reg + core->iobase;  in pic32_refo_clk_register()
566 	refo->parent_map = data->parent_map;  in pic32_refo_clk_register()
568 	clk = devm_clk_register(core->dev, &refo->hw);  in pic32_refo_clk_register()