clk/ingenic/tcu.c

10 #include <linux/mfd/ingenic-tcu.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
46 	struct ingenic_tcu *tcu;
69 	struct ingenic_tcu *tcu = tcu_clk->tcu;
71 	regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit));
80 	struct ingenic_tcu *tcu = tcu_clk->tcu;
82 	regmap_write(tcu->map, TCU_REG_TSSR, BIT(info->gate_bit));
91 	regmap_read(tcu_clk->tcu->map, TCU_REG_TSR, &value);
100 	struct ingenic_tcu *tcu = tcu_clk->tcu;
108 	regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit));
117 	struct ingenic_tcu *tcu = tcu_clk->tcu;
119 	regmap_write(tcu->map, TCU_REG_TSSR, BIT(info->gate_bit));
129 	ret = regmap_read(tcu_clk->tcu->map, info->tcsr_reg, &val);
144 	ret = regmap_update_bits(tcu_clk->tcu->map, info->tcsr_reg,
162 	ret = regmap_read(tcu_clk->tcu->map, info->tcsr_reg, &prescale);
209 	ret = regmap_update_bits(tcu_clk->tcu->map, info->tcsr_reg,
268 static int __init ingenic_tcu_register_clock(struct ingenic_tcu *tcu,
283 	tcu_clk->tcu = tcu;
287 	regmap_update_bits(tcu->map, info->tcsr_reg, 0xffff, BIT(parent));
327 	{ .compatible = "ingenic,jz4740-tcu", .data = &jz4740_soc_info, },
328 	{ .compatible = "ingenic,jz4725b-tcu", .data = &jz4725b_soc_info, },
329 	{ .compatible = "ingenic,jz4760-tcu", .data = &jz4770_soc_info, },
330 	{ .compatible = "ingenic,jz4770-tcu", .data = &jz4770_soc_info, },
331 	{ .compatible = "ingenic,x1000-tcu", .data = &x1000_soc_info, },
338 	struct ingenic_tcu *tcu;
347 	tcu = kzalloc(sizeof(*tcu), GFP_KERNEL);
348 	if (!tcu)
351 	tcu->map = map;
352 	tcu->soc_info = id->data;
354 	if (tcu->soc_info->has_tcu_clk) {
355 		tcu->clk = of_clk_get_by_name(np, "tcu");
356 		if (IS_ERR(tcu->clk)) {
357 			ret = PTR_ERR(tcu->clk);
366 			if (tcu->soc_info->allow_missing_tcu_clk && ret == -EINVAL) {
368 				tcu->clk = NULL;
374 			ret = clk_prepare_enable(tcu->clk);
382 	tcu->clocks = kzalloc(struct_size(tcu->clocks, hws, TCU_CLK_COUNT),
384 	if (!tcu->clocks) {
389 	tcu->clocks->num = TCU_CLK_COUNT;
391 	for (i = 0; i < tcu->soc_info->num_channels; i++) {
392 		ret = ingenic_tcu_register_clock(tcu, i, TCU_PARENT_EXT,
394 						 tcu->clocks);
408 	ret = ingenic_tcu_register_clock(tcu, TCU_CLK_WDT, TCU_PARENT_RTC,
410 					 tcu->clocks);
416 	if (tcu->soc_info->has_ost) {
417 		ret = ingenic_tcu_register_clock(tcu, TCU_CLK_OST,
420 						 tcu->clocks);
427 	ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, tcu->clocks);
433 	ingenic_tcu = tcu;
438 	if (tcu->soc_info->has_ost)
439 		clk_hw_unregister(tcu->clocks->hws[i + 1]);
441 	clk_hw_unregister(tcu->clocks->hws[i]);
443 	for (i = 0; i < tcu->clocks->num; i++)
444 		if (tcu->clocks->hws[i])
445 			clk_hw_unregister(tcu->clocks->hws[i]);
446 	kfree(tcu->clocks);
448 	if (tcu->clk)
449 		clk_disable_unprepare(tcu->clk);
451 	if (tcu->clk)
452 		clk_put(tcu->clk);
454 	kfree(tcu);
460 	struct ingenic_tcu *tcu = ingenic_tcu;
462 	if (tcu->clk)
463 		clk_disable(tcu->clk);
470 	struct ingenic_tcu *tcu = ingenic_tcu;
472 	if (tcu->clk)
473 		clk_enable(tcu->clk);
492 CLK_OF_DECLARE_DRIVER(jz4740_cgu, "ingenic,jz4740-tcu", ingenic_tcu_init);
493 CLK_OF_DECLARE_DRIVER(jz4725b_cgu, "ingenic,jz4725b-tcu", ingenic_tcu_init);
494 CLK_OF_DECLARE_DRIVER(jz4760_cgu, "ingenic,jz4760-tcu", ingenic_tcu_init);
495 CLK_OF_DECLARE_DRIVER(jz4770_cgu, "ingenic,jz4770-tcu", ingenic_tcu_init);
496 CLK_OF_DECLARE_DRIVER(x1000_cgu, "ingenic,x1000-tcu", ingenic_tcu_init);