clk/hisilicon/clk-hi3620.c

283 	struct clk_mmc *mclk = to_mmc(hw);
285 	if ((req->rate <= 13000000) && (mclk->id == HI3620_MMC_CIUCLK1)) {
322 	struct clk_mmc *mclk = to_mmc(hw);
359 	val = readl_relaxed(mclk->clken_reg);
360 	val &= ~(1 << mclk->clken_bit);
361 	writel_relaxed(val, mclk->clken_reg);
363 	val = readl_relaxed(mclk->sam_reg);
364 	val = mmc_clk_delay(val, sam, mclk->sam_off, mclk->sam_bits);
365 	writel_relaxed(val, mclk->sam_reg);
367 	val = readl_relaxed(mclk->drv_reg);
368 	val = mmc_clk_delay(val, drv, mclk->drv_off, mclk->drv_bits);
369 	writel_relaxed(val, mclk->drv_reg);
371 	val = readl_relaxed(mclk->div_reg);
372 	val = mmc_clk_delay(val, div, mclk->div_off, mclk->div_bits);
373 	writel_relaxed(val, mclk->div_reg);
375 	val = readl_relaxed(mclk->clken_reg);
376 	val |= 1 << mclk->clken_bit;
377 	writel_relaxed(val, mclk->clken_reg);
386 	struct clk_mmc *mclk = to_mmc(hw);
389 	if (mclk->id == HI3620_MMC_CIUCLK1)
413 	struct clk_mmc *mclk;
417 	mclk = kzalloc(sizeof(*mclk), GFP_KERNEL);
418 	if (!mclk)
426 	mclk->hw.init = &init;
428 	mclk->id = mmc_clk->id;
429 	mclk->clken_reg = base + mmc_clk->clken_reg;
430 	mclk->clken_bit = mmc_clk->clken_bit;
431 	mclk->div_reg = base + mmc_clk->div_reg;
432 	mclk->div_off = mmc_clk->div_off;
433 	mclk->div_bits = mmc_clk->div_bits;
434 	mclk->drv_reg = base + mmc_clk->drv_reg;
435 	mclk->drv_off = mmc_clk->drv_off;
436 	mclk->drv_bits = mmc_clk->drv_bits;
437 	mclk->sam_reg = base + mmc_clk->sam_reg;
438 	mclk->sam_off = mmc_clk->sam_off;
439 	mclk->sam_bits = mmc_clk->sam_bits;
441 	clk = clk_register(NULL, &mclk->hw);
443 		kfree(mclk);