clk/at91/sckc.c

72 	struct clk_slow_osc *osc = to_clk_slow_osc(hw);
73 	void __iomem *sckcr = osc->sckcr;
76 	if (tmp & (osc->bits->cr_osc32byp | osc->bits->cr_osc32en))
79 	writel(tmp | osc->bits->cr_osc32en, sckcr);
82 		udelay(osc->startup_usec);
84 		usleep_range(osc->startup_usec, osc->startup_usec + 1);
91 	struct clk_slow_osc *osc = to_clk_slow_osc(hw);
92 	void __iomem *sckcr = osc->sckcr;
95 	if (tmp & osc->bits->cr_osc32byp)
98 	writel(tmp & ~osc->bits->cr_osc32en, sckcr);
103 	struct clk_slow_osc *osc = to_clk_slow_osc(hw);
104 	void __iomem *sckcr = osc->sckcr;
107 	if (tmp & osc->bits->cr_osc32byp)
110 	return !!(tmp & osc->bits->cr_osc32en);
127 	struct clk_slow_osc *osc;
135 	osc = kzalloc(sizeof(*osc), GFP_KERNEL);
136 	if (!osc)
145 	osc->hw.init = &init;
146 	osc->sckcr = sckcr;
147 	osc->startup_usec = startup;
148 	osc->bits = bits;
151 		writel((readl(sckcr) & ~osc->bits->cr_osc32en) |
152 					osc->bits->cr_osc32byp, sckcr);
154 	hw = &osc->hw;
155 	ret = clk_hw_register(NULL, &osc->hw);
157 		kfree(osc);
166 	struct clk_slow_osc *osc = to_clk_slow_osc(hw);
169 	kfree(osc);
175 	struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
177 	return osc->frequency;
183 	struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
185 	return osc->accuracy;
190 	struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
191 	void __iomem *sckcr = osc->sckcr;
193 	writel(readl(sckcr) | osc->bits->cr_rcen, sckcr);
196 		udelay(osc->startup_usec);
198 		usleep_range(osc->startup_usec, osc->startup_usec + 1);
205 	struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
206 	void __iomem *sckcr = osc->sckcr;
208 	writel(readl(sckcr) & ~osc->bits->cr_rcen, sckcr);
213 	struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
215 	return !!(readl(osc->sckcr) & osc->bits->cr_rcen);
234 	struct clk_slow_rc_osc *osc;
242 	osc = kzalloc(sizeof(*osc), GFP_KERNEL);
243 	if (!osc)
252 	osc->hw.init = &init;
253 	osc->sckcr = sckcr;
254 	osc->bits = bits;
255 	osc->frequency = frequency;
256 	osc->accuracy = accuracy;
257 	osc->startup_usec = startup;
259 	hw = &osc->hw;
260 	ret = clk_hw_register(NULL, &osc->hw);
262 		kfree(osc);
271 	struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
274 	kfree(osc);
395 		child = of_get_compatible_child(np, "atmel,at91sam9x5-clk-slow-osc");
400 		bypass = of_property_read_bool(child, "atmel,osc-bypass");
404 		bypass = of_property_read_bool(np, "atmel,osc-bypass");
498 	bypass = of_property_read_bool(np, "atmel,osc-bypass");
547 	struct clk_sama5d4_slow_osc *osc = to_clk_sama5d4_slow_osc(hw);
549 	if (osc->prepared)
556 	if ((readl(osc->sckcr) & osc->bits->cr_oscsel)) {
557 		osc->prepared = true;
562 		udelay(osc->startup_usec);
564 		usleep_range(osc->startup_usec, osc->startup_usec + 1);
565 	osc->prepared = true;
572 	struct clk_sama5d4_slow_osc *osc = to_clk_sama5d4_slow_osc(hw);
574 	return osc->prepared;
590 	struct clk_sama5d4_slow_osc *osc;
614 	osc = kzalloc(sizeof(*osc), GFP_KERNEL);
615 	if (!osc)
624 	osc->hw.init = &init;
625 	osc->sckcr = regbase;
626 	osc->startup_usec = 1200000;
627 	osc->bits = &at91sama5d4_bits;
629 	ret = clk_hw_register(NULL, &osc->hw);
634 	parent_hws[1] = &osc->hw;
650 	clk_hw_unregister(&osc->hw);
652 	kfree(osc);