drivers/ata/sata_mv.c

883 	void __iomem *hc_mmio = mv_hc_base_from_port(mmio, port);
886 	return hc_mmio + ofs;
1042 	void __iomem *hc_mmio = mv_hc_base_from_port(
1051 	writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE);
1064 	void __iomem *mmio = hpriv->base, *hc_mmio;
1103 	hc_mmio = mv_hc_base_from_port(mmio, 0);
1104 	writel(clks,  hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD);
1105 	writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD);
1106 	writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE);
1110 		hc_mmio = mv_hc_base_from_port(mmio, MV_PORTS_PER_HC);
1111 		writel(clks,  hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD);
1112 		writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD);
1113 		writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE);
1529 	void __iomem *hc_mmio;
1535 	hc_mmio = mv_hc_base_from_port(mv_host_base(host), ap->port_no);
1536 	led_ctrl = readl(hc_mmio + SOC_LED_CTRL);
1537 	writel(led_ctrl | SOC_LED_CTRL_BLINK, hc_mmio + SOC_LED_CTRL);
1544 	void __iomem *hc_mmio;
1561 	hc_mmio = mv_hc_base_from_port(mv_host_base(host), ap->port_no);
1562 	led_ctrl = readl(hc_mmio + SOC_LED_CTRL);
1563 	writel(led_ctrl & ~SOC_LED_CTRL_BLINK, hc_mmio + SOC_LED_CTRL);
2852 	void __iomem *mmio = hpriv->base, *hc_mmio;
2900 			hc_mmio = mv_hc_base_from_port(mmio, port);
2901 			writelfl(~ack_irqs, hc_mmio + HC_IRQ_CAUSE);
3147 #define ZERO(reg) writel(0, hc_mmio + (reg))
3151 	void __iomem *hc_mmio = mv_hc_base(mmio, hc);
3159 	tmp = readl(hc_mmio + 0x20);
3162 	writel(tmp, hc_mmio + 0x20);
3431 #define ZERO(reg) writel(0, hc_mmio + (reg))
3435 	void __iomem *hc_mmio = mv_hc_base(mmio, 0);
3638 	void __iomem *hc_mmio = mv_hc_base_from_port(hpriv->base, port);
3647 	writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE);
3932 		void __iomem *hc_mmio = mv_hc_base(mmio, hc);
3936 			readl(hc_mmio + HC_CFG),
3937 			readl(hc_mmio + HC_IRQ_CAUSE));
3940 		writelfl(0, hc_mmio + HC_IRQ_CAUSE);