drivers/ata/sata_highbank.c

62 static struct phy_lane_info port_data[CPHY_PORT_COUNT];
217 	u8 dev = port_data[sata_port].phy_devs;
219 	writel(CPHY_MAP(dev, addr), port_data[sata_port].phy_base + 0x800);
220 	data = readl(port_data[sata_port].phy_base + CPHY_ADDR(addr));
227 	u8 dev = port_data[sata_port].phy_devs;
229 	writel(CPHY_MAP(dev, addr), port_data[sata_port].phy_base + 0x800);
230 	writel(data, port_data[sata_port].phy_base + CPHY_ADDR(addr));
259 	u8 lane = port_data[sata_port].lane_mapping;
261 	if (unlikely(port_data[sata_port].phy_base == NULL))
270 	u8 lane = port_data[sata_port].lane_mapping;
289 	u8 lane = port_data[sata_port].lane_mapping;
313 	u8 lane = port_data[sata_port].lane_mapping;
316 	if (unlikely(port_data[sata_port].phy_base == NULL))
323 	cphy_override_tx_attenuation(sata_port, port_data[sata_port].tx_atten);
334 	memset(port_data, 0, sizeof(struct phy_lane_info) * CPHY_PORT_COUNT);
356 		port_data[port].lane_mapping = phy_data.args[0];
358 		port_data[port].phy_devs = tmp;
359 		port_data[port].phy_base = cphy_base[phy];
366 		port_data[i].tx_atten = (u8) tx_atten[i];