kernel/apic/x2apic_uv_x.c

6  * SGI UV APIC functions (note: not an Intel compatible APIC)
22 #include <asm/uv/uv_mmrs.h>
23 #include <asm/uv/uv_hub.h>
24 #include <asm/uv/bios.h>
25 #include <asm/uv/uv.h>
42 /* Information derived from CPUID and some UV MMRs */
66 		panic("UV: error: undefined MMR: %s\n", str);
68 		pr_crit("UV: error: undefined MMR: %s\n", str);
124 			"UV: WARN: GAM_ADDR_MAP_CONFIG is not available\n");
136 	pr_info("UV: n_skt:%d pnmsk:%x pn:%x\n",
140 /* Running on a UV Hubbed system, determine which UV Hub Type it is */
190 	pr_info("UV: part#:%x rev:%d rev_id:%d UVtype:0x%x\n",
210 	/* UV2,3,4, UV BIOS TSC sync state available */
220 		mark_tsc_async_resets("UV BIOS");
231 		mark_tsc_unstable("UV BIOS");
234 	pr_info("UV: TSC sync state from BIOS:0%d(%s)\n", sync_state, state);
256 		pr_info("UV: CPU does not have valid CPUID.11\n");
259 	pr_info("UV: apicid_shift:%d apicid_mask:0x%x\n", uv_cpuid.apicid_shift, uv_cpuid.apicid_mask);
260 	pr_info("UV: socketid_shift:%d pnode_mask:0x%x\n", uv_cpuid.socketid_shift, uv_cpuid.pnode_mask);
271 /* Find UV arch type entry in UVsystab */
288 /* Validate UV arch type field in UVsystab */
295 		pr_info("UV: UVarchtype received from BIOS\n");
302 /* Determine if UV arch type entry might exist in UVsystab */
316 		pr_err("UV: Cannot access UVsystab, remap failed\n");
330 		pr_err("UV: Cannot access UVarchtype, remap failed\n");
345 /* UV system found, check which APIC MODE BIOS already selected */
371 			/* (Not hubless), not a UV */
374 		/* Is UV hubless system */
392 		pr_info("UV: OEM IDs %s/%s, SystemType %d, HUBLESS ID %x\n",
399 		pr_err("UV: NUMA is off, disabling UV support\n");
435 	/* Get UV hub chip part number & revision */
438 	/* Other UV setup functions */
455 	/* If not UV, return. */
462 	pr_info("UV: OEM IDs %s/%s, System/UVType %d/0x%x, HUB RevID %d\n",
529 /* Default UV memory block size is 2GB */
532 /* Kernel parameter to specify UV mem block size */
566 		pr_info("UV: mem_block_size set to 0x%lx\n", mem_block_size);
569 		pr_err("UV: mem_block_size error with 0x%lx\n", mem_block_size);
601 			pr_info("UV: extra hole in GAM RE table @%d\n", (int)(gre - uv_gre_table));
605 			pr_err("UV: GAM table sockid(%d) too large(>%d) @%d\n", gre->sockid, _max_socket, (int)(gre - uv_gre_table));
666 		pr_info("UV: GAM Range %2d %04x 0x%013lx-0x%013lx (%d)\n", i, grt->nasid, start, end, gb);
755 	.name				= "UV large system",
833 		pr_info("UV: Map %s_HI base address NULL\n", id);
841 	pr_info("UV: Map %s_HI 0x%lx - 0x%lx %s (%d segments)\n",
860 		pr_err("UV: GRU unavailable (no MMR)\n");
865 		pr_info("UV: GRU disabled (by BIOS)\n");
896 		pr_err("UV:%s:RH_GAM_MMR_OVERLAY_CONFIG MMR undefined?\n",
904 		pr_info("UV: MMR disabled\n");
967 		pr_err("UV:%s:Invalid mapping type:%d\n", __func__, index);
981 			pr_info("UV: %s redirect base 0x%lx(@0x%lx) 0x%04x\n",
987 			pr_debug("UV:%s:Invalid NASID(%x):%x (range:%x..%x)\n",
1013 			pr_info("UV: %s[%03d..%03d] NASID 0x%04x ADDR 0x%016lx - 0x%016lx\n",
1023 	pr_info("UV: %s base:0x%lx shift:%d m_io:%d max_io:%d max_pnode:0x%x\n",
1039 			pr_info("UV: MMIOH0 disabled\n");
1047 			pr_info("UV: MMIOH1 disabled\n");
1061 			pr_info("UV: MMIOH0 disabled\n");
1074 			pr_info("UV: MMIOH1 disabled\n");
1093 			pr_info("UV: MMIOH disabled\n");
1119 		pr_warn("UV: unable to determine platform RTC clock frequency, guessing.\n");
1148  * Called on each CPU to initialize the per_cpu UV data area.
1238 	pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, hi->m_shift, hi->n_lshift);
1239 	pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", hi->gpa_mask, hi->gpa_shift, hi->pnode_mask, hi->apic_pnode_shift);
1240 	pr_info("UV: mmr_base/shift:0x%lx/%ld\n", hi->global_mmr_base, hi->global_mmr_shift);
1242 		pr_info("UV: gru_base/shift:0x%lx/%ld\n",
1245 	pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", hi->gnode_upper, hi->gnode_extra);
1252 	pr_info("UV: GAM Params...\n");
1253 	pr_info("UV: mmr_base/shift:0x%llx/%d gru_base/shift:0x%llx/%d gpa_shift:%d\n",
1286 			pr_info("UV: GAM Range Table...\n");
1287 			pr_info("UV:  # %20s %14s %6s %4s %5s %3s %2s\n", "Range", "", "Size", "Type", "NASID", "SID", "PN");
1289 		pr_info("UV: %2d: 0x%014lx-0x%014lx%c %5lu%c %3d   %04x  %02x %02x\n",
1316 	pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x), pnodes(min:%x,max:%x), gap_end(%d)\n",
1336 		pr_err("UV: BIOS UVsystab mismatch, (%x < %x)\n",
1338 		pr_err("UV: Does not support UV, switch to non-UV x86_64\n");
1367 			pr_err("UV:%s:Unrecognized UV_SYSTAB_TYPE:%d, skipped\n",
1408 		pr_info("UV: NODE_PRESENT_DEPTH = %d\n",
1412 			pr_info("UV: NODE_PRESENT(%d) = 0x%016lx\n", i, np);
1418 		pr_info("UV: NODE_PRESENT_0 = 0x%016lx\n", np);
1423 		pr_info("UV: NODE_PRESENT_1 = 0x%016lx\n", np);
1436 	pr_info("UV: number nodes/possible blades %d (%d - %d)\n",
1472 	pr_info("UV: %s is 1:1, conversion table removed\n", tname);
1492 			pr_info("UV: No UVsystab socket table, ignoring\n");
1495 		pr_err("UV: Error: UVsystab address translations not available!\n");
1527 		pr_info("UV: sid:%02x type:%d nasid:%04x pn:%02x pn2s:%2x\n",
1551 		pr_info("UV: sid:%02x: apicid:%04x socket:%02d node:%03x s2n:%03x\n",
1617 /* Initialize UV hubless systems */
1659 		pr_err("UV: Unknown/unsupported UV hub\n");
1662 	pr_info("UV: Found %s hub\n", hub);
1666 	/* Get uv_systab for decoding, setup UV BIOS calls */
1669 	/* If there's an UVsystab problem then abort UV init: */
1671 		pr_err("UV: Mangled UVsystab format\n");
1687 	pr_info("UV: Found %d hubs, %d nodes, %d CPUs\n", uv_num_possible_blades(), num_possible_nodes(), num_possible_cpus());
1781 		pr_info("UV: HUB:%2d pn:%02x nrcpus:%d\n",
1787 	pr_info("UV: min_pnode:%02x max_pnode:%02x\n", min_pnode, max_pnode);
1806  * There is a different code path needed to initialize a UV system that does
1807  * not have a "UV HUB" (referred to as "hubless").