cpu/sh4/probe.c

35 	boot_cpu_data.icache.way_incr		= (1 << 13);
36 	boot_cpu_data.icache.entry_shift	= 5;
37 	boot_cpu_data.icache.sets		= 256;
38 	boot_cpu_data.icache.ways		= 1;
39 	boot_cpu_data.icache.linesz		= L1_CACHE_BYTES;
44 	boot_cpu_data.dcache.way_incr		= (1 << 14);
45 	boot_cpu_data.dcache.entry_shift	= 5;
46 	boot_cpu_data.dcache.sets		= 512;
47 	boot_cpu_data.dcache.ways		= 1;
48 	boot_cpu_data.dcache.linesz		= L1_CACHE_BYTES;
51 	boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1;
57 		boot_cpu_data.family = CPU_FAMILY_SH4A;
60 			boot_cpu_data.flags |= CPU_HAS_DSP;
61 			boot_cpu_data.family = CPU_FAMILY_SH4AL_DSP;
64 		boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER;
65 		boot_cpu_data.cut_major = pvr & 0x7f;
67 		boot_cpu_data.icache.ways = 4;
68 		boot_cpu_data.dcache.ways = 4;
71 		boot_cpu_data.flags |= CPU_HAS_PTEA | CPU_HAS_FPU;
72 		boot_cpu_data.family = CPU_FAMILY_SH4;
77 		boot_cpu_data.flags |= CPU_HAS_FPU;
88 		boot_cpu_data.type = CPU_SH7750;
89 		boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG |
93 		boot_cpu_data.type = CPU_SH7750S;
94 		boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG |
98 		boot_cpu_data.type = CPU_SH7751;
102 		boot_cpu_data.type = CPU_SH7770;
107 			boot_cpu_data.type = CPU_SH7781;
109 			boot_cpu_data.type = CPU_SH7763;
111 			boot_cpu_data.type = CPU_SH7780;
117 		boot_cpu_data.type = CPU_SH7343;
121 		boot_cpu_data.type = CPU_SH7785;
125 		boot_cpu_data.type = CPU_SH7786;
126 		boot_cpu_data.flags |= CPU_HAS_PTEAEX | CPU_HAS_L2_CACHE;
132 			boot_cpu_data.type = CPU_SH7723;
133 			boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
136 			boot_cpu_data.type = CPU_SH7366;
140 			boot_cpu_data.type = CPU_SH7722;
147 			boot_cpu_data.type = CPU_SH7724;
148 			boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
152 			boot_cpu_data.type = CPU_SH7757;
156 			boot_cpu_data.type = CPU_SH7372;
159 			boot_cpu_data.type = CPU_SH7734; /* SH7733/SH7734 */
166 		boot_cpu_data.type = CPU_SHX3;
169 		boot_cpu_data.type = CPU_SH4_501;
170 		boot_cpu_data.flags &= ~CPU_HAS_FPU;
171 		boot_cpu_data.icache.ways = 2;
172 		boot_cpu_data.dcache.ways = 2;
175 		boot_cpu_data.type = CPU_SH4_202;
176 		boot_cpu_data.icache.ways = 2;
177 		boot_cpu_data.dcache.ways = 2;
182 			boot_cpu_data.type = CPU_SH7750R;
185 			boot_cpu_data.type = CPU_SH7751R;
188 			boot_cpu_data.type = CPU_SH7760;
192 		boot_cpu_data.icache.ways = 2;
193 		boot_cpu_data.dcache.ways = 2;
202 	if (boot_cpu_data.icache.ways > 1) {
204 		boot_cpu_data.icache.way_incr	= (size >> 1);
205 		boot_cpu_data.icache.sets	= (size >> 6);
210 	if (boot_cpu_data.dcache.ways > 1) {
212 		boot_cpu_data.dcache.way_incr	= (size >> 1);
213 		boot_cpu_data.dcache.sets	= (size >> 6);
219 	if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
226 			boot_cpu_data.flags &= ~CPU_HAS_L2_CACHE;
242 			boot_cpu_data.scache.way_incr		= (1 << 16);
243 			boot_cpu_data.scache.entry_shift	= 5;
244 			boot_cpu_data.scache.ways		= 4;
245 			boot_cpu_data.scache.linesz		= L1_CACHE_BYTES;
247 			boot_cpu_data.scache.entry_mask	=
248 				(boot_cpu_data.scache.way_incr -
249 				 boot_cpu_data.scache.linesz);
251 			boot_cpu_data.scache.sets	= size /
252 				(boot_cpu_data.scache.linesz *
253 				 boot_cpu_data.scache.ways);
255 			boot_cpu_data.scache.way_size	=
256 				(boot_cpu_data.scache.sets *
257 				 boot_cpu_data.scache.linesz);