boards/mach-kfr2r09/lcd_wqvga.c

59 static unsigned long read_reg(void *sohandle,
62 	return so->read_data(sohandle);
65 static void write_reg(void *sohandle,
70 		so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */
72 		so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */
75 static void write_data(void *sohandle,
82 		write_reg(sohandle, so, 1, data[i]);
85 static unsigned long read_device_code(void *sohandle,
91 	write_reg(sohandle, so, 0, 0xb0);
92 	write_reg(sohandle, so, 1, 0x00);
95 	write_reg(sohandle, so, 0, 0xb1);
96 	write_reg(sohandle, so, 1, 0x00);
99 	write_reg(sohandle, so, 0, 0xbf);
103 	read_reg(sohandle, so);
106 	device_code = ((read_reg(sohandle, so) & 0xff) << 24);
107 	device_code |= ((read_reg(sohandle, so) & 0xff) << 16);
108 	device_code |= ((read_reg(sohandle, so) & 0xff) << 8);
109 	device_code |= (read_reg(sohandle, so) & 0xff);
114 static void write_memory_start(void *sohandle,
117 	write_reg(sohandle, so, 0, 0x2c);
120 static void clear_memory(void *sohandle,
126 	write_memory_start(sohandle, so);
130 		write_reg(sohandle, so, 1, 0x00);
133 static void display_on(void *sohandle,
137 	write_reg(sohandle, so, 0, 0xb0);
138 	write_reg(sohandle, so, 1, 0x00);
141 	write_reg(sohandle, so, 0, 0xb1);
142 	write_reg(sohandle, so, 1, 0x00);
145 	write_reg(sohandle, so, 0, 0xb3);
146 	write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if));
149 	write_reg(sohandle, so, 0, 0xb4);
150 	write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */
153 	write_reg(sohandle, so, 0, 0xc0);
154 	write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel));
157 	write_reg(sohandle, so, 0, 0xc1);
158 	write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
161 	write_reg(sohandle, so, 0, 0xc2);
162 	write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
165 	write_reg(sohandle, so, 0, 0xc3);
166 	write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
169 	write_reg(sohandle, so, 0, 0xc4);
170 	write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src));
173 	write_reg(sohandle, so, 0, 0xc8);
174 	write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
177 	write_reg(sohandle, so, 0, 0xc9);
178 	write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
181 	write_reg(sohandle, so, 0, 0xca);
182 	write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
185 	write_reg(sohandle, so, 0, 0xd0);
186 	write_data(sohandle, so, data_power, ARRAY_SIZE(data_power));
189 	write_reg(sohandle, so, 0, 0xd1);
190 	write_reg(sohandle, so, 1, 0x00);
191 	write_reg(sohandle, so, 1, 0x0f);
192 	write_reg(sohandle, so, 1, 0x02);
195 	write_reg(sohandle, so, 0, 0xd2);
196 	write_reg(sohandle, so, 1, 0x63);
197 	write_reg(sohandle, so, 1, 0x24);
200 	write_reg(sohandle, so, 0, 0xd3);
201 	write_reg(sohandle, so, 1, 0x63);
202 	write_reg(sohandle, so, 1, 0x24);
205 	write_reg(sohandle, so, 0, 0xd4);
206 	write_reg(sohandle, so, 1, 0x63);
207 	write_reg(sohandle, so, 1, 0x24);
209 	write_reg(sohandle, so, 0, 0xd8);
210 	write_reg(sohandle, so, 1, 0x77);
211 	write_reg(sohandle, so, 1, 0x77);
214 	write_reg(sohandle, so, 0, 0x35);
215 	write_reg(sohandle, so, 1, 0x00);
218 	write_reg(sohandle, so, 0, 0x44);
219 	write_reg(sohandle, so, 1, 0x00);
220 	write_reg(sohandle, so, 1, 0x00);
223 	write_reg(sohandle, so, 0, 0x2a);
224 	write_reg(sohandle, so, 1, 0x00);
225 	write_reg(sohandle, so, 1, 0x00);
226 	write_reg(sohandle, so, 1, 0x00);
227 	write_reg(sohandle, so, 1, 0xef);
230 	write_reg(sohandle, so, 0, 0x2b);
231 	write_reg(sohandle, so, 1, 0x00);
232 	write_reg(sohandle, so, 1, 0x00);
233 	write_reg(sohandle, so, 1, 0x01);
234 	write_reg(sohandle, so, 1, 0x8f);
237 	write_reg(sohandle, so, 0, 0x11);
242 	clear_memory(sohandle, so);
245 	write_reg(sohandle, so, 0, 0x29);
248 	write_memory_start(sohandle, so);
251 int kfr2r09_lcd_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
263 	if (read_device_code(sohandle, so) != 0x01221517)
268 	display_on(sohandle, so);
272 void kfr2r09_lcd_start(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
274 	write_memory_start(sohandle, so);