platforms/52xx/mpc52xx_pic.c

36  * systems can have multiple interrupt controllers, the virtual IRQ (virq)
38  * of IRQ numbers and the virq infrastructure maps those numbers into
41  * To define a range of virq numbers for this controller, this driver first
45  * level 2 or L2 value.  The virq number is determined by shifting up the
49  * virq for TMR0 is calculated by ((1 << MPC52xx_IRQ_L1_OFFSET) | 9).
54  * a separate virq number for each bestcomm task (since any of the 16
303  * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
337  * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
339 static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
365 		irq_set_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr);
366 		pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",
367 			 __func__, l2irq, virq, (int)irq, type);
379 		irq_set_chip(virq, &no_irq_chip);
383 	irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
384 	pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq);
395  * mpc52xx_init_irq - Initialize and register with the virq subsystem
401  * initializes it, and registers it with the virq subsystem.
447 	 * hw irq information provided by the ofw to linux virq