mips/pci/pci-rc32434.c

115 	pcicvalue = rc32434_pci->pcic;
126 	rc32434_pci->pcic = pcicdata;	/* Enable the PCI bus Interface */
129 		pcicdata = rc32434_pci->pcis;
134 	rc32434_pci->pcis = 0;
135 	rc32434_pci->pcism = 0xFFFFFFFF;
137 	rc32434_pci->pcidac = 0;	/*
141 	rc32434_pci->pcidas = 0;	/* clear the status */
142 	rc32434_pci->pcidasm = 0x0000007F;	/* Mask all the interrupts */
151 	rc32434_pci->pcilba[0].address = (unsigned int) (PCI_ADDR_START);
155 	rc32434_pci->pcilba[0].mapping = (unsigned int) (PCI_ADDR_START);
159 	rc32434_pci->pcilba[0].control =
161 	dummyread = rc32434_pci->pcilba[0].control;	/* flush the CPU write Buffers */
162 	rc32434_pci->pcilba[1].address = 0x60000000;
163 	rc32434_pci->pcilba[1].mapping = 0x60000000;
166 	rc32434_pci->pcilba[1].control =
168 	dummyread = rc32434_pci->pcilba[1].control;	/* flush the CPU write Buffers */
169 	rc32434_pci->pcilba[2].address = 0x18C00000;
170 	rc32434_pci->pcilba[2].mapping = 0x18FFFFFF;
173 	rc32434_pci->pcilba[2].control =
175 	dummyread = rc32434_pci->pcilba[2].control;	/* flush the CPU write Buffers */
178 	rc32434_pci->pcilba[3].address = 0x18800000;
179 	rc32434_pci->pcilba[3].mapping = 0x18800000;
180 	rc32434_pci->pcilba[3].control =
183 	dummyread = rc32434_pci->pcilba[3].control;	/* flush the CPU write Buffers */
187 		rc32434_pci->pcicfga = pci_config_addr;
188 		dummyread = rc32434_pci->pcicfga;
189 		rc32434_pci->pcicfgd = korina_cnfg_regs[loopCount];
190 		dummyread = rc32434_pci->pcicfgd;
193 	rc32434_pci->pcitc =
197 	pcicntlval = rc32434_pci->pcic;
199 	rc32434_pci->pcic = pcicntlval;
200 	pcicntlval = rc32434_pci->pcic;