mips/pci/pci-ar724x.c

56 static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
60 	reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET);
73 static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
82 	if (!apc->link_up)
85 	base = apc->crp_base;
116 	struct ar724x_pci_controller *apc;
120 	apc = pci_bus_to_ar724x_controller(bus);
121 	if (!apc->link_up)
127 	base = apc->devcfg_base;
150 	    apc->bar0_is_cached) {
152 		*value = apc->bar0_value;
163 	struct ar724x_pci_controller *apc;
168 	apc = pci_bus_to_ar724x_controller(bus);
169 	if (!apc->link_up)
187 			apc->bar0_is_cached = true;
188 			apc->bar0_value = value;
192 			apc->bar0_is_cached = false;
196 	base = apc->devcfg_base;
231 	struct ar724x_pci_controller *apc;
235 	apc = irq_desc_get_handler_data(desc);
236 	base = apc->ctrl_base;
242 		generic_handle_irq(apc->irq_base + 0);
250 	struct ar724x_pci_controller *apc;
255 	apc = irq_data_get_irq_chip_data(d);
256 	base = apc->ctrl_base;
257 	offset = apc->irq_base - d->irq;
271 	struct ar724x_pci_controller *apc;
276 	apc = irq_data_get_irq_chip_data(d);
277 	base = apc->ctrl_base;
278 	offset = apc->irq_base - d->irq;
305 static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
311 	base = apc->ctrl_base;
316 	apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
318 	for (i = apc->irq_base;
319 	     i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
322 		irq_set_chip_data(i, apc);
325 	irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
326 					 apc);
329 static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc)
349 	app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
351 	__raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP);
357 	} while (wait < 10 && !ar724x_pci_check_link(apc));
362 	struct ar724x_pci_controller *apc;
370 	apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller),
372 	if (!apc)
375 	apc->ctrl_base = devm_platform_ioremap_resource_byname(pdev, "ctrl_base");
376 	if (IS_ERR(apc->ctrl_base))
377 		return PTR_ERR(apc->ctrl_base);
379 	apc->devcfg_base = devm_platform_ioremap_resource_byname(pdev, "cfg_base");
380 	if (IS_ERR(apc->devcfg_base))
381 		return PTR_ERR(apc->devcfg_base);
383 	apc->crp_base = devm_platform_ioremap_resource_byname(pdev, "crp_base");
384 	if (IS_ERR(apc->crp_base))
385 		return PTR_ERR(apc->crp_base);
387 	apc->irq = platform_get_irq(pdev, 0);
388 	if (apc->irq < 0)
395 	apc->io_res.parent = res;
396 	apc->io_res.name = "PCI IO space";
397 	apc->io_res.start = res->start;
398 	apc->io_res.end = res->end;
399 	apc->io_res.flags = IORESOURCE_IO;
405 	apc->mem_res.parent = res;
406 	apc->mem_res.name = "PCI memory space";
407 	apc->mem_res.start = res->start;
408 	apc->mem_res.end = res->end;
409 	apc->mem_res.flags = IORESOURCE_MEM;
411 	apc->pci_controller.pci_ops = &ar724x_pci_ops;
412 	apc->pci_controller.io_resource = &apc->io_res;
413 	apc->pci_controller.mem_resource = &apc->mem_res;
420 		ar724x_pci_hw_init(apc);
422 	apc->link_up = ar724x_pci_check_link(apc);
423 	if (!apc->link_up)
426 	ar724x_pci_irq_init(apc, id);
428 	ar724x_pci_local_write(apc, PCI_COMMAND, 4, AR724X_PCI_CMD_INIT);
430 	register_pci_controller(&apc->pci_controller);