mips/lantiq/irq.c

51 #define ltq_icu_w32(vpe, m, x, y)	\
52 	ltq_w32((x), ltq_icu_membase[vpe] + m*LTQ_ICU_IM_SIZE + (y))
54 #define ltq_icu_r32(vpe, m, x)		\
55 	ltq_r32(ltq_icu_membase[vpe] + m*LTQ_ICU_IM_SIZE + (x))
84 	int vpe;
89 	for_each_present_cpu(vpe) {
90 		ltq_icu_w32(vpe, im,
91 			    ltq_icu_r32(vpe, im, LTQ_ICU_IER) & ~BIT(offset),
102 	int vpe;
107 	for_each_present_cpu(vpe) {
108 		ltq_icu_w32(vpe, im,
109 			    ltq_icu_r32(vpe, im, LTQ_ICU_IER) & ~BIT(offset),
111 		ltq_icu_w32(vpe, im, BIT(offset), LTQ_ICU_ISR);
121 	int vpe;
126 	for_each_present_cpu(vpe) {
127 		ltq_icu_w32(vpe, im, BIT(offset), LTQ_ICU_ISR);
137 	int vpe;
141 	vpe = cpumask_first(irq_data_get_effective_affinity_mask(d));
144 	if (unlikely(vpe >= nr_cpu_ids))
145 		vpe = smp_processor_id();
149 	ltq_icu_w32(vpe, im, ltq_icu_r32(vpe, im, LTQ_ICU_IER) | BIT(offset),
292 	int vpe = smp_processor_id();
294 	irq = ltq_icu_r32(vpe, module, LTQ_ICU_IOSR);
344 	int i, ret, vpe;
347 	for_each_possible_cpu(vpe) {
348 		if (of_address_to_resource(node, vpe, &res))
349 			panic("Failed to get icu%i memory range", vpe);
353 			pr_err("Failed to request icu%i memory\n", vpe);
355 		ltq_icu_membase[vpe] = ioremap(res.start,
358 		if (!ltq_icu_membase[vpe])
359 			panic("Failed to remap icu%i memory", vpe);
363 	for_each_possible_cpu(vpe) {
366 			ltq_icu_w32(vpe, i, 0, LTQ_ICU_IER);
369 			ltq_icu_w32(vpe, i, ~0, LTQ_ICU_ISR);
370 			ltq_icu_w32(vpe, i, ~0, LTQ_ICU_IMR);
373 			ltq_icu_w32(vpe, i, 0, LTQ_ICU_IRSR);