mips/cavium-octeon/smp.c

102 	int coreid = cpu_logical_map(cpu);
104 	pr_info("SMP: Mailbox send cpu=%d, coreid=%d, action=%u\n", cpu,
105 	       coreid, action);
107 	cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action);
142 	const int coreid = cvmx_get_core_num();
158 	__cpu_number_map[coreid] = 0;
159 	__cpu_logical_map[0] = coreid;
164 		if ((id != coreid) && cvmx_coremask_is_core_set(&sysinfo->core_mask, id)) {
307 	int coreid = cpu_logical_map(cpu);
319 	mask = 1 << coreid;
337 	pr_info("Reset core %d. Available Coremask = 0x%x \n", coreid, new_mask);
339 	cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);
366 	int coreid = cpu_logical_map(cpu);
380 		labi->avail_coremask &= ~(1 << coreid);
386 	if (!(avail_coremask & (1 << coreid))) {
388 		cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);
392 	boot_vect[coreid].app_start_func_addr =
394 	boot_vect[coreid].code_addr = octeon_bootloader_entry_addr;
398 	cvmx_write_csr(CVMX_CIU_NMI, (1 << coreid) & avail_coremask);