Lines Matching refs:tmp2
431 .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup
432 dcache_line_size \tmp1, \tmp2
433 dcache_by_myline_op \op, \domain, \start, \end, \tmp1, \tmp2, \fixup
444 .macro invalidate_icache_by_line start, end, tmp1, tmp2, fixup
445 icache_line_size \tmp1, \tmp2
446 sub \tmp2, \tmp1, #1
447 bic \tmp2, \start, \tmp2
449 ic ivau, \tmp2 // invalidate I line PoU
450 add \tmp2, \tmp2, \tmp1
451 cmp \tmp2, \end
464 .macro load_ttbr1, pgtbl, tmp1, tmp2
466 offset_ttbr1 \tmp1, \tmp2
478 .macro break_before_make_ttbr_switch zero_page, page_table, tmp, tmp2
484 load_ttbr1 \page_table, \tmp, \tmp2
637 .macro tcr_clear_errata_bits, tcr, tmp1, tmp2
641 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001_MASK
642 and \tmp1, \tmp1, \tmp2
643 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001
644 cmp \tmp1, \tmp2
647 mov_q \tmp2, TCR_CLEAR_FUJITSU_ERRATUM_010001
648 bic \tcr, \tcr, \tmp2
758 .macro cond_yield, lbl:req, tmp:req, tmp2