Lines Matching +full:1 +full:ac00000
234 clocks = <&cpufreq_hw 1>;
245 qcom,freq-domain = <&cpufreq_hw 1>;
258 clocks = <&cpufreq_hw 1>;
269 qcom,freq-domain = <&cpufreq_hw 1>;
327 little_cpu_sleep_1: cpu-sleep-0-1 {
337 big_cpu_sleep_0: cpu-sleep-1-0 {
347 big_cpu_sleep_1: cpu-sleep-1-1 {
367 cluster_sleep_cx_ret: cluster-sleep-1 {
691 qcom,client-id = <1>;
715 #qcom,smem-state-cells = <1>;
739 #qcom,smem-state-cells = <1>;
756 qcom,remote-pid = <1>;
760 #qcom,smem-state-cells = <1>;
771 #qcom,smem-state-cells = <1>;
795 #clock-cells = <1>;
796 #reset-cells = <1>;
797 #power-domain-cells = <1>;
810 #address-cells = <1>;
811 #size-cells = <1>;
815 bits = <1 3>;
818 gpu_speed_bin: gpu-speed-bin@1d2 {
849 mmc-ddr-1_8v;
850 mmc-hs200-1_8v;
851 mmc-hs400-1_8v;
895 #address-cells = <1>;
915 #address-cells = <1>;
949 #address-cells = <1>;
969 #address-cells = <1>;
1003 #address-cells = <1>;
1039 #address-cells = <1>;
1059 #address-cells = <1>;
1093 #address-cells = <1>;
1129 #address-cells = <1>;
1149 #address-cells = <1>;
1196 #address-cells = <1>;
1216 #address-cells = <1>;
1250 #address-cells = <1>;
1286 #address-cells = <1>;
1306 #address-cells = <1>;
1340 #address-cells = <1>;
1376 #address-cells = <1>;
1396 #address-cells = <1>;
1430 #address-cells = <1>;
1450 #address-cells = <1>;
1533 ufs_mem_hc: ufshc@1d84000 {
1540 lanes-per-direction = <1>;
1541 #reset-cells = <1>;
1582 ufs_mem_phy: phy@1d87000 {
1598 ice: crypto@1d90000 {
1605 ipa: ipa@1e40000 {
1620 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1639 <&ipa_smp2p_out 1>;
1646 tcsr_mutex: hwlock@1f40000 {
1649 #hwlock-cells = <1>;
1652 tcsr_regs_1: syscon@1f60000 {
1657 tcsr_regs_2: syscon@1fc0000 {
2132 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2159 qcom,remote-pid = <1>;
2246 #iommu-cells = <1>;
2303 #clock-cells = <1>;
2304 #reset-cells = <1>;
2305 #power-domain-cells = <1>;
2349 #address-cells = <1>;
2377 #address-cells = <1>;
2405 #address-cells = <1>;
2415 port@1 {
2416 reg = <1>;
2482 #address-cells = <1>;
2719 #address-cells = <1>;
2729 port@1 {
2730 reg = <1>;
2851 #address-cells = <1>;
2898 #clock-cells = <1>;
2899 #phy-cells = <1>;
2918 opp-1 {
2956 opp-1 {
3141 #clock-cells = <1>;
3142 #reset-cells = <1>;
3143 #power-domain-cells = <1>;
3146 camnoc_virt: interconnect@ac00000 {
3160 #clock-cells = <1>;
3161 #reset-cells = <1>;
3162 #power-domain-cells = <1>;
3179 #interrupt-cells = <1>;
3223 #address-cells = <1>;
3298 #address-cells = <1>;
3304 #address-cells = <1>;
3314 port@1 {
3315 reg = <1>;
3350 #clock-cells = <1>;
3393 #address-cells = <1>;
3402 port@1 {
3403 reg = <1>;
3449 #clock-cells = <1>;
3450 #reset-cells = <1>;
3451 #power-domain-cells = <1>;
3457 qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
3466 #reset-cells = <1>;
3477 #thermal-sensor-cells = <1>;
3488 #thermal-sensor-cells = <1>;
3494 #reset-cells = <1>;
3520 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3533 #address-cells = <1>;
3534 #size-cells = <1>;
3548 #global-interrupts = <1>;
3647 #msi-cells = <1>;
3657 #mbox-cells = <1>;
3668 #address-cells = <1>;
3669 #size-cells = <1>;
3683 frame-number = <1>;
3730 reg-names = "drv-0", "drv-1", "drv-2";
3739 <CONTROL_TCS 1>;
3746 #clock-cells = <1>;
3751 #power-domain-cells = <1>;
3815 #interconnect-cells = <1>;
3826 #freq-domain-cells = <1>;
3827 #clock-cells = <1>;
3859 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3891 #address-cells = <1>;
3907 #address-cells = <1>;
3909 #sound-dai-cells = <1>;
3925 #address-cells = <1>;
3927 #sound-dai-cells = <1>;
3948 #address-cells = <1>;
3982 #clock-cells = <1>;
3983 #power-domain-cells = <1>;
4015 #sound-dai-cells = <1>;
4016 #address-cells = <1>;
4032 #clock-cells = <1>;
4033 #power-domain-cells = <1>;
4043 thermal-sensors = <&tsens0 1>;
4623 thermal-sensors = <&tsens1 1>;
4803 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,