Lines Matching +full:0 +full:x0ab00000
32 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
50 clocks = <&cpufreq_hw 0>;
55 qcom,freq-domain = <&cpufreq_hw 0>;
68 reg = <0x0 0x1>;
69 clocks = <&cpufreq_hw 0>;
74 qcom,freq-domain = <&cpufreq_hw 0>;
82 reg = <0x0 0x2>;
83 clocks = <&cpufreq_hw 0>;
88 qcom,freq-domain = <&cpufreq_hw 0>;
96 reg = <0x0 0x3>;
97 clocks = <&cpufreq_hw 0>;
102 qcom,freq-domain = <&cpufreq_hw 0>;
128 cluster_sleep: cluster-sleep-0 {
130 arm,psci-suspend-param = <0x41000043>;
140 cpu_sleep: cpu-sleep-0 {
143 arm,psci-suspend-param = <0x40000003>;
166 reg = <0 0x40000000 0 0>;
179 #power-domain-cells = <0>;
185 #power-domain-cells = <0>;
191 #power-domain-cells = <0>;
197 #power-domain-cells = <0>;
203 #power-domain-cells = <0>;
216 mboxes = <&apcs_glb 0>;
280 #power-domain-cells = <0>;
298 reg = <0x0 0x45700000 0x0 0x600000>;
303 reg = <0x0 0x45e00000 0x0 0x140000>;
308 reg = <0x0 0x45fff000 0x0 0x1000>;
314 reg = <0x0 0x46000000 0x0 0x200000>;
322 reg = <0x0 0x4ab00000 0x0 0x6900000>;
327 reg = <0x0 0x51400000 0x0 0x500000>;
332 reg = <0x0 0x51900000 0x0 0x100000>;
337 reg = <0x0 0x51a00000 0x0 0x1c00000>;
342 reg = <0x0 0x53600000 0x0 0x10000>;
347 reg = <0x0 0x53610000 0x0 0x5000>;
353 reg = <0x0 0x53615000 0x0 0x2000>;
358 reg = <0x0 0x5c000000 0x0 0x00f00000>;
363 reg = <0x0 0x5cf00000 0x0 0x0100000>;
368 reg = <0x0 0x60000000 0x0 0x3900000>;
374 reg = <0x0 0x89b01000 0x0 0x200000>;
390 qcom,local-pid = <0>;
413 qcom,local-pid = <0>;
434 soc: soc@0 {
438 ranges = <0 0 0 0 0x10 0>;
439 dma-ranges = <0 0 0 0 0x10 0>;
443 reg = <0x0 0x00340000 0x0 0x20000>;
449 reg = <0x0 0x003c0000 0x0 0x40000>;
454 reg = <0x0 0x00500000 0x0 0x300000>;
457 gpio-ranges = <&tlmm 0 0 127>;
661 reg = <0x0 0x01400000 0x0 0x1f0000>;
671 reg = <0x0 0x01613000 0x0 0x180>;
679 #phy-cells = <0>;
686 reg = <0x0 0x01615000 0x0 0x1000>;
702 #clock-cells = <0>;
705 #phy-cells = <0>;
708 qcom,tcsr-reg = <&tcsr_regs 0xb244>;
714 #size-cells = <0>;
716 port@0 {
717 reg = <0>;
735 reg = <0x0 0x01880000 0x0 0x60200>;
756 reg = <0x0 0x01900000 0x0 0x8200>;
762 reg = <0x0 0x01b04000 0x0 0x24000>;
767 qcom,ee = <0>;
769 iommus = <&apps_smmu 0x0084 0x11>,
770 <&apps_smmu 0x0086 0x11>;
775 reg = <0x0 0x01b3a000 0x0 0x6000>;
780 iommus = <&apps_smmu 0x0084 0x11>,
781 <&apps_smmu 0x0086 0x11>;
786 reg = <0x0 0x01b44000 0x0 0x3000>;
791 reg = <0x25b 0x1>;
796 reg = <0x2006 0x2>;
803 reg = <0x0 0x01b8e300 0x0 0x600>;
813 opp-0 {
857 reg = <0x0 0x01c40000 0x0 0x1100>,
858 <0x0 0x01e00000 0x0 0x2000000>,
859 <0x0 0x03e00000 0x0 0x100000>,
860 <0x0 0x03f00000 0x0 0xa0000>,
861 <0x0 0x01c0a000 0x0 0x26000>;
869 qcom,ee = <0>;
870 qcom,channel = <0>;
872 #size-cells = <0>;
879 reg = <0x0 0x04411000 0x0 0x1ff>,
880 <0x0 0x04410000 0x0 0x8>;
890 reg = <0x0 0x04453000 0x0 0x1000>;
897 reg = <0x0 0x04480000 0x0 0x80000>;
903 reg = <0x0 0x045f0000 0x0 0x7000>;
906 ranges = <0 0x0 0x045f0000 0x7000>;
909 reg = <0x1b8 0x48>;
915 reg = <0x0 0x04690000 0x0 0x10000>;
920 reg = <0x0 0x04744000 0x0 0x1000>,
921 <0x0 0x04745000 0x0 0x1000>,
922 <0x0 0x04748000 0x0 0x8000>;
944 iommus = <&apps_smmu 0xc0 0x0>;
952 qcom,dll-config = <0x000f642c>;
953 qcom,ddr-config = <0x80040868>;
986 reg = <0x0 0x04784000 0x0 0x1000>;
1004 iommus = <&apps_smmu 0xa0 0x0>;
1012 qcom,dll-config = <0x0007642c>;
1013 qcom,ddr-config = <0x80040868>;
1039 reg = <0x0 0x04a00000 0x0 0x60000>;
1051 dma-channel-mask = <0x1f>;
1052 iommus = <&apps_smmu 0xf6 0x0>;
1059 reg = <0x0 0x04ac0000 0x0 0x2000>;
1063 iommus = <&apps_smmu 0xe3 0x0>;
1071 reg = <0x0 0x04a80000 0x0 0x4000>;
1075 pinctrl-0 = <&qup_i2c0_default>;
1077 dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
1078 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1090 #size-cells = <0>;
1096 reg = <0x0 0x04a80000 0x0 0x4000>;
1100 pinctrl-0 = <&qup_spi0_default>;
1102 dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
1103 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1112 #size-cells = <0>;
1118 reg = <0x0 0x04a80000 0x0 0x4000>;
1122 pinctrl-0 = <&qup_uart0_default>;
1135 reg = <0x0 0x04a84000 0x0 0x4000>;
1139 pinctrl-0 = <&qup_i2c1_default>;
1141 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1154 #size-cells = <0>;
1160 reg = <0x0 0x04a84000 0x0 0x4000>;
1164 pinctrl-0 = <&qup_spi1_default>;
1166 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1176 #size-cells = <0>;
1182 reg = <0x0 0x04a88000 0x0 0x4000>;
1186 pinctrl-0 = <&qup_i2c2_default>;
1188 dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
1201 #size-cells = <0>;
1207 reg = <0x0 0x04a88000 0x0 0x4000>;
1211 pinctrl-0 = <&qup_spi2_default>;
1213 dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
1223 #size-cells = <0>;
1229 reg = <0x0 0x04a8c000 0x0 0x4000>;
1233 pinctrl-0 = <&qup_i2c3_default>;
1235 dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
1248 #size-cells = <0>;
1254 reg = <0x0 0x04a8c000 0x0 0x4000>;
1258 pinctrl-0 = <&qup_spi3_default>;
1260 dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
1270 #size-cells = <0>;
1276 reg = <0x0 0x04a8c000 0x0 0x4000>;
1280 pinctrl-0 = <&qup_uart3_default>;
1293 reg = <0x0 0x04a90000 0x0 0x4000>;
1297 pinctrl-0 = <&qup_i2c4_default>;
1299 dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
1312 #size-cells = <0>;
1318 reg = <0x0 0x04a90000 0x0 0x4000>;
1323 pinctrl-0 = <&qup_spi4_default>;
1324 dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
1334 #size-cells = <0>;
1340 reg = <0x0 0x04a90000 0x0 0x4000>;
1344 pinctrl-0 = <&qup_uart4_default>;
1357 reg = <0x0 0x04a94000 0x0 0x4000>;
1361 pinctrl-0 = <&qup_i2c5_default>;
1363 dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
1376 #size-cells = <0>;
1382 reg = <0x0 0x04a94000 0x0 0x4000>;
1386 pinctrl-0 = <&qup_spi5_default>;
1388 dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
1398 #size-cells = <0>;
1405 reg = <0x0 0x04ef8800 0x0 0x400>;
1447 reg = <0x0 0x04e00000 0x0 0xcd00>;
1451 iommus = <&apps_smmu 0x120 0x0>;
1455 snps,hird-threshold = /bits/ 8 <0x10>;
1463 #size-cells = <0>;
1465 port@0 {
1466 reg = <0>;
1485 reg = <0x0 0x05900000 0x0 0x40000>;
1507 iommus = <&adreno_smmu 0 1>,
1508 <&adreno_smmu 2 0>;
1531 opp-supported-hw = <0x3>;
1539 opp-supported-hw = <0x3>;
1547 opp-supported-hw = <0x3>;
1554 opp-supported-hw = <0x7>;
1561 opp-supported-hw = <0xf>;
1568 opp-supported-hw = <0xf>;
1575 opp-supported-hw = <0xf>;
1582 reg = <0x0 0x0596a000 0x0 0x30000>;
1592 reg = <0x0 0x05990000 0x0 0x9000>;
1607 reg = <0x0 0x059a0000 0x0 0x10000>;
1634 reg = <0x0 0x5c6e000 0x0 0x1000>,
1635 <0x0 0x5c75000 0x0 0x1000>,
1636 <0x0 0x5c52000 0x0 0x1000>,
1637 <0x0 0x5c53000 0x0 0x1000>,
1638 <0x0 0x5c66000 0x0 0x400>,
1639 <0x0 0x5c68000 0x0 0x400>,
1640 <0x0 0x5c11000 0x0 0x1000>,
1641 <0x0 0x5c6f000 0x0 0x4000>,
1642 <0x0 0x5c76000 0x0 0x4000>;
1711 iommus = <&apps_smmu 0x400 0x0>,
1712 <&apps_smmu 0x800 0x0>,
1713 <&apps_smmu 0x820 0x0>,
1714 <&apps_smmu 0x840 0x0>;
1722 #size-cells = <0>;
1724 port@0 {
1725 reg = <0>;
1736 reg = <0x0 0x05e00000 0x0 0x1000>;
1753 iommus = <&apps_smmu 0x420 0x2>,
1754 <&apps_smmu 0x421 0x0>;
1770 reg = <0x0 0x05e01000 0x0 0x8f000>,
1771 <0x0 0x05eb0000 0x0 0x3000>;
1776 interrupts = <0>;
1794 #size-cells = <0>;
1796 port@0 {
1797 reg = <0>;
1836 reg = <0x0 0x05e94000 0x0 0x400>;
1865 #size-cells = <0>;
1890 #size-cells = <0>;
1892 port@0 {
1893 reg = <0>;
1911 reg = <0x0 0x05e94400 0x0 0x100>,
1912 <0x0 0x05e94500 0x0 0x300>,
1913 <0x0 0x05e94800 0x0 0x188>;
1927 #phy-cells = <0>;
1935 reg = <0x0 0x05f00000 0x0 0x20000>;
1955 reg = <0x0 0x06080000 0x0 0x100>;
1958 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
1977 qcom,smem-states = <&modem_smp2p_out 0>;
1992 reg = <0x0 0x0ab00000 0x0 0x100>;
1995 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
2013 qcom,smem-states = <&adsp_smp2p_out 0>;
2028 reg = <0x0 0x0c600000 0x0 0x80000>;
2101 reg = <0x0 0x0c800000 0x0 0x800000>;
2116 iommus = <&apps_smmu 0x1a0 0x1>;
2123 reg = <0x0 0x0f017000 0x0 0x1000>;
2131 reg = <0x0 0x0f111000 0x0 0x1000>;
2137 reg = <0x0 0x0f120000 0x0 0x1000>;
2140 ranges = <0 0x0 0x0f121000 0x8000>;
2142 frame@0 {
2143 reg = <0x0 0x1000>,
2144 <0x1000 0x1000>;
2147 frame-number = <0>;
2151 reg = <0x2000 0x1000>;
2158 reg = <0x3000 0x1000>;
2165 reg = <0x4000 0x1000>;
2172 reg = <0x5000 0x1000>;
2179 reg = <0x6000 0x1000>;
2186 reg = <0x7000 0x1000>;
2195 reg = <0x0 0x0f200000 0x0 0x10000>,
2196 <0x0 0x0f300000 0x0 0x100000>;
2202 redistributor-stride = <0x0 0x20000>;
2207 reg = <0x0 0x0f521000 0x0 0x1000>;
2209 interrupts-extended = <&lmh_cluster 0>;
2210 interrupt-names = "dcvsh-irq-0";
2220 reg = <0x0 0x0f550800 0x0 0x400>;
2233 thermal-sensors = <&tsens0 0>;
2478 <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;