Lines Matching +full:0 +full:x004a9000
28 #clock-cells = <0>;
34 #clock-cells = <0>;
42 #size-cells = <0>;
44 cpu0: cpu@0 {
47 reg = <0x0>;
59 reg = <0x1>;
71 reg = <0x2>;
83 reg = <0x3>;
95 reg = <0x100>;
107 reg = <0x101>;
119 reg = <0x102>;
131 reg = <0x103>;
172 l2_0: l2-cache-0 {
199 reg = <0 0x10000000 0 0>;
217 mboxes = <&apcs 0>;
287 reg = <0x0 0x81800000 0x0 0x2000>;
292 reg = <0x0 0x85b00000 0x0 0x800000>;
298 reg = <0x0 0x86300000 0x0 0x100000>;
305 reg = <0x0 0x86400000 0x0 0x400000>;
310 reg = <0x0 0x86c00000 0x0 0x6a00000>;
315 reg = <0x0 0x8d600000 0x0 0x1100000>;
320 reg = <0x0 0x8e700000 0x0 0x700000>;
325 reg = <0 0x90000000 0 0x1000>;
330 reg = <0x0 0x90001000 0x0 0x13ff000>;
335 reg = <0x0 0x91400000 0x0 0x700000>;
340 reg = <0x0 0x92000000 0x0 0x100000>;
346 reg = <0x0 0xf2d00000 0x0 0x180000>;
361 qcom,local-pid = <0>;
385 qcom,local-pid = <0>;
410 qcom,local-pid = <0>;
431 #size-cells = <0>;
433 mboxes = <0>, <&apcs 13>, <0>, <&apcs 19>;
435 apps_smsm: apps@0 {
436 reg = <0>;
458 soc: soc@0 {
461 ranges = <0 0 0 0xffffffff>;
466 reg = <0x00060000 0x8000>;
471 reg = <0x00079000 0x180>;
472 #phy-cells = <0>;
487 reg = <0x000e3000 0x1000>;
494 reg = <0x00400000 0x5a000>;
501 reg = <0x004a9000 0x1000>, /* TM */
502 <0x004a8000 0x1000>; /* SROT */
512 reg = <0x004ab000 0x4>;
517 reg = <0x00500000 0x12080>;
527 reg = <0x00580000 0x16080>;
540 reg = <0x01000000 0x300000>;
543 gpio-ranges = <&tlmm 0 0 142>;
867 reg = <0x01800000 0x80000>;
887 reg = <0x01905000 0x20000>;
893 reg = <0x01937000 0x30000>;
898 reg = <0x0193f044 0x4>;
904 reg = <0x01a00000 0x1000>,
905 <0x01ab0000 0x1040>;
941 reg = <0x01a01000 0x89000>;
945 interrupts = <0>;
958 iommus = <&apps_iommu 0x15>;
962 #size-cells = <0>;
964 port@0 {
965 reg = <0>;
982 reg = <0x01a94000 0x400>;
1009 #size-cells = <0>;
1015 #size-cells = <0>;
1017 port@0 {
1018 reg = <0>;
1034 reg = <0x01a94400 0x100>,
1035 <0x01a94500 0x300>,
1036 <0x01a94800 0x188>;
1042 #phy-cells = <0>;
1052 reg = <0x01a96000 0x400>;
1082 #size-cells = <0>;
1084 port@0 {
1085 reg = <0>;
1101 reg = <0x01a96400 0x100>,
1102 <0x01a96500 0x300>,
1103 <0x01a96800 0x188>;
1109 #phy-cells = <0>;
1120 reg = <0x01c00000 0x40000>;
1143 iommus = <&gpu_iommu 0>;
1159 opp-supported-hw = <0xff>;
1165 opp-supported-hw = <0xff>;
1171 opp-supported-hw = <0xff>;
1177 opp-supported-hw = <0xff>;
1183 opp-supported-hw = <0xff>;
1189 opp-supported-hw = <0xff>;
1195 opp-supported-hw = <0xff>;
1205 opp-supported-hw = <0xff>;
1213 ranges = <0 0x01c48000 0x8000>;
1228 iommu-ctx@0 {
1230 reg = <0x0000 0x1000>;
1237 reg = <0x2000 0x1000>;
1244 ranges = <0 0x01e20000 0x20000>;
1259 reg = <0x14000 0x1000>;
1266 reg = <0x15000 0x1000>;
1273 reg = <0x16000 0x1000>;
1280 reg = <0x0200f000 0x1000>,
1281 <0x02400000 0x800000>,
1282 <0x02c00000 0x800000>,
1283 <0x03800000 0x200000>,
1284 <0x0200a000 0x2100>;
1288 qcom,ee = <0>;
1289 qcom,channel = <0>;
1294 #size-cells = <0>;
1299 reg = <0x04080000 0x100>,
1300 <0x04020000 0x040>;
1304 <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
1322 qcom,smem-states = <&smp2p_modem_out 0>;
1328 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1343 qcom,smd-edge = <0>;
1353 reg = <0x070f8800 0x400>;
1395 reg = <0x07000000 0xcc00>;
1404 snps,hird-threshold = /bits/ 8 <0x00>;
1412 #size-cells = <0>;
1414 port@0 {
1415 reg = <0>;
1427 reg = <0x07824900 0x500>, <0x07824000 0x800>;
1450 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
1504 reg = <0x07864900 0x500>, <0x07864000 0x800>;
1527 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
1576 reg = <0x07884000 0x1f000>;
1582 qcom,ee = <0>;
1589 reg = <0x078af000 0x200>;
1600 reg = <0x078b5000 0x600>;
1609 pinctrl-0 = <&i2c_1_default>;
1613 #size-cells = <0>;
1620 reg = <0x078b6000 0x600>;
1629 pinctrl-0 = <&i2c_2_default>;
1633 #size-cells = <0>;
1640 reg = <0x078b7000 0x600>;
1649 pinctrl-0 = <&i2c_3_default>;
1653 #size-cells = <0>;
1660 reg = <0x078b7000 0x600>;
1669 pinctrl-0 = <&spi_3_default>;
1673 #size-cells = <0>;
1680 reg = <0x078b8000 0x600>;
1689 pinctrl-0 = <&i2c_4_default>;
1693 #size-cells = <0>;
1700 reg = <0x07ac4000 0x1f000>;
1706 qcom,ee = <0>;
1713 reg = <0x07aef000 0x200>;
1719 dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
1722 pinctrl-0 = <&uart_5_default>;
1731 reg = <0x07af5000 0x600>;
1740 pinctrl-0 = <&i2c_5_default>;
1744 #size-cells = <0>;
1751 reg = <0x07af5000 0x600>;
1760 pinctrl-0 = <&spi_5_default>;
1764 #size-cells = <0>;
1771 reg = <0x07af6000 0x600>;
1780 pinctrl-0 = <&i2c_6_default>;
1784 #size-cells = <0>;
1791 reg = <0x07af6000 0x600>;
1800 pinctrl-0 = <&spi_6_default>;
1804 #size-cells = <0>;
1811 reg = <0x07af7000 0x600>;
1820 pinctrl-0 = <&i2c_7_default>;
1824 #size-cells = <0>;
1831 reg = <0x07af8000 0x600>;
1840 pinctrl-0 = <&i2c_8_default>;
1844 #size-cells = <0>;
1851 reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
1857 <&smp2p_wcnss_in 0 IRQ_TYPE_EDGE_RISING>,
1867 qcom,smem-states = <&smp2p_wcnss_out 0>;
1871 pinctrl-0 = <&wcnss_pin_a>;
1919 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
1924 reg = <0x0b011000 0x1000>;
1930 reg = <0x0b120000 0x1000>;
1936 frame-number = <0>;
1939 reg = <0x0b121000 0x1000>,
1940 <0x0b122000 0x1000>;
1946 reg = <0x0b123000 0x1000>;
1953 reg = <0x0b124000 0x1000>;
1960 reg = <0x0b125000 0x1000>;
1967 reg = <0x0b126000 0x1000>;
1974 reg = <0x0b127000 0x1000>;
1981 reg = <0x0b128000 0x1000>;
1988 reg = <0x0c200000 0x100>;
1990 interrupts-extended = <&intc 0 293 IRQ_TYPE_EDGE_RISING>,
1991 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
2005 qcom,smem-states = <&smp2p_adsp_out 0>;
2023 #size-cells = <0>;
2036 #size-cells = <0>;
2041 qcom,sd-lines = <0 1>;
2045 qcom,sd-lines = <0 1>;
2049 qcom,sd-lines = <0>;
2065 #size-cells = <0>;
2068 dai@0 {
2093 #sound-dai-cells = <0>;