Lines Matching +full:vusb33 +full:- +full:supply
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
39 num-interpolated-steps = <1023>;
40 default-brightness-level = <576>;
43 dmic_codec: dmic-codec {
44 compatible = "dmic-codec";
45 num-channels = <2>;
46 wakeup-delay-ms = <50>;
49 pp1000_dpbrdg: regulator-1v0-dpbrdg {
50 compatible = "regulator-fixed";
51 regulator-name = "pp1000_dpbrdg";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
54 regulator-min-microvolt = <1000000>;
55 regulator-max-microvolt = <1000000>;
56 enable-active-high;
57 regulator-boot-on;
59 vin-supply = <&mt6359_vs2_buck_reg>;
62 pp1000_mipibrdg: regulator-1v0-mipibrdg {
63 compatible = "regulator-fixed";
64 regulator-name = "pp1000_mipibrdg";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
67 regulator-min-microvolt = <1000000>;
68 regulator-max-microvolt = <1000000>;
69 enable-active-high;
70 regulator-boot-on;
72 vin-supply = <&mt6359_vs2_buck_reg>;
75 pp1800_dpbrdg: regulator-1v8-dpbrdg {
76 compatible = "regulator-fixed";
77 regulator-name = "pp1800_dpbrdg";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
80 enable-active-high;
81 regulator-boot-on;
83 vin-supply = <&mt6359_vio18_ldo_reg>;
87 pp1800_ldo_g: regulator-1v8-g {
88 compatible = "regulator-fixed";
89 regulator-name = "pp1800_ldo_g";
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&pp3300_g>;
97 pp1800_mipibrdg: regulator-1v8-mipibrdg {
98 compatible = "regulator-fixed";
99 regulator-name = "pp1800_mipibrdg";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
102 enable-active-high;
103 regulator-boot-on;
105 vin-supply = <&mt6359_vio18_ldo_reg>;
108 pp3300_dpbrdg: regulator-3v3-dpbrdg {
109 compatible = "regulator-fixed";
110 regulator-name = "pp3300_dpbrdg";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
113 enable-active-high;
114 regulator-boot-on;
116 vin-supply = <&pp3300_g>;
120 pp3300_g: regulator-3v3-g {
121 compatible = "regulator-fixed";
122 regulator-name = "pp3300_g";
123 regulator-always-on;
124 regulator-boot-on;
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 vin-supply = <&ppvar_sys>;
131 pp3300_ldo_z: regulator-3v3-z {
132 compatible = "regulator-fixed";
133 regulator-name = "pp3300_ldo_z";
134 regulator-always-on;
135 regulator-boot-on;
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 vin-supply = <&ppvar_sys>;
141 pp3300_mipibrdg: regulator-3v3-mipibrdg {
142 compatible = "regulator-fixed";
143 regulator-name = "pp3300_mipibrdg";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
146 enable-active-high;
147 regulator-boot-on;
149 vin-supply = <&pp3300_g>;
150 off-on-delay-us = <500000>;
154 pp3300_u: regulator-3v3-u {
155 compatible = "regulator-fixed";
156 regulator-name = "pp3300_u";
157 regulator-always-on;
158 regulator-boot-on;
159 regulator-min-microvolt = <3300000>;
160 regulator-max-microvolt = <3300000>;
162 vin-supply = <&pp3300_g>;
165 pp3300_wlan: regulator-3v3-wlan {
166 compatible = "regulator-fixed";
167 regulator-name = "pp3300_wlan";
168 regulator-always-on;
169 regulator-boot-on;
170 regulator-min-microvolt = <3300000>;
171 regulator-max-microvolt = <3300000>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pp3300_wlan_pins>;
174 enable-active-high;
179 pp5000_a: regulator-5v0-a {
180 compatible = "regulator-fixed";
181 regulator-name = "pp5000_a";
182 regulator-always-on;
183 regulator-boot-on;
184 regulator-min-microvolt = <5000000>;
185 regulator-max-microvolt = <5000000>;
186 vin-supply = <&ppvar_sys>;
189 /* system wide semi-regulated power rail from battery or USB */
190 ppvar_sys: regulator-var-sys {
191 compatible = "regulator-fixed";
192 regulator-name = "ppvar_sys";
193 regulator-always-on;
194 regulator-boot-on;
197 reserved_memory: reserved-memory {
198 #address-cells = <2>;
199 #size-cells = <2>;
202 afe_dma_mem: audio-dma-pool {
203 compatible = "shared-dma-pool";
206 no-map;
210 compatible = "shared-dma-pool";
212 no-map;
216 compatible = "restricted-dma-pool";
221 rt1015p: audio-codec {
223 pinctrl-names = "default";
224 pinctrl-0 = <&rt1015p_pins>;
225 sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>;
226 #sound-dai-cells = <0>;
231 pinctrl-names = "aud_clk_mosi_off",
257 pinctrl-0 = <&aud_clk_mosi_off_pins>;
258 pinctrl-1 = <&aud_clk_mosi_on_pins>;
259 pinctrl-2 = <&aud_dat_mosi_off_pins>;
260 pinctrl-3 = <&aud_dat_mosi_on_pins>;
261 pinctrl-4 = <&aud_dat_miso_off_pins>;
262 pinctrl-5 = <&aud_dat_miso_on_pins>;
263 pinctrl-6 = <&vow_dat_miso_off_pins>;
264 pinctrl-7 = <&vow_dat_miso_on_pins>;
265 pinctrl-8 = <&vow_clk_miso_off_pins>;
266 pinctrl-9 = <&vow_clk_miso_on_pins>;
267 pinctrl-10 = <&aud_nle_mosi_off_pins>;
268 pinctrl-11 = <&aud_nle_mosi_on_pins>;
269 pinctrl-12 = <&aud_dat_miso2_off_pins>;
270 pinctrl-13 = <&aud_dat_miso2_on_pins>;
271 pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
272 pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
273 pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
274 pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
275 pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
276 pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
277 pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
278 pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
279 pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
280 pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
281 pinctrl-24 = <&aud_gpio_tdm_off_pins>;
282 pinctrl-25 = <&aud_gpio_tdm_on_pins>;
287 memory-region = <&afe_dma_mem>;
295 remote-endpoint = <&anx7625_in>;
299 mediatek,broken-save-restore-fw;
303 mali-supply = <&mt6315_7_vbuck1>;
310 clock-frequency = <400000>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&i2c0_pins>;
316 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
317 pinctrl-names = "default";
318 pinctrl-0 = <&touchscreen_pins>;
325 clock-frequency = <400000>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&i2c1_pins>;
329 rt5682: audio-codec@1a {
332 interrupts-extended = <&pio 18 IRQ_TYPE_LEVEL_LOW>;
333 realtek,jd-src = <1>;
334 #sound-dai-cells = <1>;
336 AVDD-supply = <&mt6359_vio18_ldo_reg>;
337 DBVDD-supply = <&mt6359_vio18_ldo_reg>;
338 LDO1-IN-supply = <&mt6359_vio18_ldo_reg>;
339 MICVDD-supply = <&pp3300_g>;
346 clock-frequency = <400000>;
347 clock-stretch-ns = <12600>;
348 pinctrl-names = "default";
349 pinctrl-0 = <&i2c2_pins>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&trackpad_pins>;
356 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
357 vcc-supply = <&pp3300_u>;
358 wakeup-source;
365 clock-frequency = <400000>;
366 pinctrl-names = "default";
367 pinctrl-0 = <&i2c3_pins>;
372 pinctrl-names = "default";
373 pinctrl-0 = <&anx7625_pins>;
374 enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
375 reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
376 vdd10-supply = <&pp1000_mipibrdg>;
377 vdd18-supply = <&pp1800_mipibrdg>;
378 vdd33-supply = <&pp3300_mipibrdg>;
381 #address-cells = <1>;
382 #size-cells = <0>;
388 remote-endpoint = <&dsi_out>;
396 remote-endpoint = <&panel_in>;
401 aux-bus {
403 compatible = "edp-panel";
404 power-supply = <&pp3300_mipibrdg>;
409 remote-endpoint = <&anx7625_out>;
420 clock-frequency = <400000>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&i2c7_pins>;
426 domain-supply = <&mt6315_7_vbuck1>;
430 domain-supply = <&mt6359_vsram_others_ldo_reg>;
440 pinctrl-names = "default", "state_uhs";
441 pinctrl-0 = <&mmc0_default_pins>;
442 pinctrl-1 = <&mmc0_uhs_pins>;
443 bus-width = <8>;
444 max-frequency = <200000000>;
445 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
446 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
447 cap-mmc-highspeed;
448 mmc-hs200-1_8v;
449 mmc-hs400-1_8v;
450 supports-cqe;
451 cap-mmc-hw-reset;
452 mmc-hs400-enhanced-strobe;
453 hs400-ds-delay = <0x12814>;
454 no-sdio;
455 no-sd;
456 non-removable;
462 pinctrl-names = "default", "state_uhs";
463 pinctrl-0 = <&mmc1_default_pins>;
464 pinctrl-1 = <&mmc1_uhs_pins>;
465 bus-width = <4>;
466 max-frequency = <200000000>;
467 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
468 vmmc-supply = <&mt6360_ldo5_reg>;
469 vqmmc-supply = <&mt6360_ldo3_reg>;
470 cap-sd-highspeed;
471 sd-uhs-sdr50;
472 sd-uhs-sdr104;
473 no-sdio;
474 no-mmc;
479 regulator-always-on;
483 regulator-always-on;
484 regulator-min-microvolt = <575000>;
485 regulator-max-microvolt = <575000>;
489 regulator-always-on;
493 regulator-min-microvolt = <750000>;
494 regulator-max-microvolt = <800000>;
495 regulator-coupled-with = <&mt6315_7_vbuck1>;
496 regulator-coupled-max-spread = <10000>;
500 regulator-always-on;
504 mediatek,dmic-mode = <1>; /* one-wire */
505 mediatek,mic-type-0 = <2>; /* DMIC */
506 mediatek,mic-type-2 = <2>; /* DMIC */
512 pinctrl-names = "default";
513 pinctrl-0 = <&nor_flash_pins>;
514 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
515 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
518 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
520 spi-max-frequency = <52000000>;
521 spi-rx-bus-width = <2>;
522 spi-tx-bus-width = <2>;
527 pinctrl-names = "default";
528 pinctrl-0 = <&pcie_pins>;
533 num-lanes = <1>;
534 bus-range = <0x1 0x1>;
536 #address-cells = <3>;
537 #size-cells = <2>;
543 memory-region = <&wifi_restricted_dma_region>;
550 gpio-line-names = "I2S_DP_LRCK",
775 anx7625_pins: anx7625-default-pins {
776 pins-out {
779 output-low;
782 pins-in {
784 input-enable;
785 bias-pull-up;
789 aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
790 pins-mosi-off {
796 aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
797 pins-mosi-on {
800 drive-strength = <10>;
804 aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
805 pins-miso-off {
810 aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
811 pins-miso-on {
816 aud_dat_miso_off_pins: aud-dat-miso-off-pins {
817 pins-miso-off {
823 aud_dat_miso_on_pins: aud-dat-miso-on-pins {
824 pins-miso-on {
827 drive-strength = <10>;
831 aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
832 pins-miso-off {
837 aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
838 pins-miso-on {
843 aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
844 pins-mosi-off {
849 aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
850 pins-mosi-on {
855 aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
856 pins-mosi-off {
862 aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
863 pins-mosi-on {
866 drive-strength = <10>;
870 aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
871 pins-i2s3-off {
878 aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
879 pins-i2s3-on {
886 aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
887 pins-i2s8-off {
895 aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
896 pins-i2s8-on {
904 aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
905 pins-i2s9-off {
910 aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
911 pins-i2s9-on {
916 aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
917 pins-tdm-off {
925 aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
926 pins-tdm-on {
934 aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
935 pins-nle-mosi-off {
941 aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
942 pins-nle-mosi-on {
948 cr50_int: cr50-irq-default-pins {
949 pins-gsc-ap-int-odl {
951 input-enable;
955 cros_ec_int: cros-ec-irq-default-pins {
956 pins-ec-ap-int-odl {
958 input-enable;
959 bias-pull-up;
963 i2c0_pins: i2c0-default-pins {
964 pins-bus {
967 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
968 drive-strength-microamp = <1000>;
972 i2c1_pins: i2c1-default-pins {
973 pins-bus {
976 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
977 drive-strength-microamp = <1000>;
981 i2c2_pins: i2c2-default-pins {
982 pins-bus {
985 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
989 i2c3_pins: i2c3-default-pins {
990 pins-bus {
993 bias-disable;
994 drive-strength-microamp = <1000>;
998 i2c7_pins: i2c7-default-pins {
999 pins-bus {
1002 bias-disable;
1003 drive-strength-microamp = <1000>;
1007 mmc0_default_pins: mmc0-default-pins {
1008 pins-cmd-dat {
1018 input-enable;
1019 drive-strength = <8>;
1020 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1023 pins-clk {
1025 drive-strength = <8>;
1026 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1029 pins-rst {
1031 drive-strength = <8>;
1032 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1036 mmc0_uhs_pins: mmc0-uhs-pins {
1037 pins-cmd-dat {
1047 input-enable;
1048 drive-strength = <10>;
1049 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1052 pins-clk {
1054 drive-strength = <10>;
1055 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1058 pins-rst {
1060 drive-strength = <8>;
1061 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1064 pins-ds {
1066 drive-strength = <10>;
1067 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1071 mmc1_default_pins: mmc1-default-pins {
1072 pins-cmd-dat {
1078 input-enable;
1079 drive-strength = <8>;
1080 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1083 pins-clk {
1085 drive-strength = <8>;
1086 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1089 pins-insert {
1091 input-enable;
1092 bias-pull-up;
1096 mmc1_uhs_pins: mmc1-uhs-pins {
1097 pins-cmd-dat {
1103 input-enable;
1104 drive-strength = <8>;
1105 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1108 pins-clk {
1110 input-enable;
1111 drive-strength = <8>;
1112 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1116 nor_flash_pins: nor-flash-default-pins {
1117 pins-cs-io1 {
1120 input-enable;
1121 bias-pull-up;
1122 drive-strength = <10>;
1125 pins-io0 {
1127 bias-pull-up;
1128 drive-strength = <10>;
1131 pins-clk {
1133 input-enable;
1134 bias-pull-up;
1135 drive-strength = <10>;
1139 pcie_pins: pcie-default-pins {
1140 pins-pcie-wake {
1142 bias-pull-up;
1145 pins-pcie-pereset {
1149 pins-pcie-clkreq {
1151 bias-pull-up;
1154 pins-wifi-kill {
1156 output-high;
1160 pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
1161 pins-en {
1163 output-low;
1167 pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
1168 pins-en {
1170 output-low;
1174 pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
1175 pins-en {
1177 output-low;
1181 pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
1182 pins-en {
1184 output-low;
1188 pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
1189 pins-en {
1191 output-low;
1195 pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
1196 pins-en {
1198 output-low;
1202 pp3300_wlan_pins: pp3300-wlan-pins {
1203 pins-pcie-en-pp3300-wlan {
1205 output-high;
1209 pwm0_pins: pwm0-default-pins {
1210 pins-pwm {
1214 pins-inhibit {
1216 output-high;
1220 rt1015p_pins: rt1015p-default-pins {
1223 output-low;
1227 scp_pins: scp-pins {
1228 pins-vreq-vao {
1233 spi1_pins: spi1-default-pins {
1234 pins-cs-mosi-clk {
1238 bias-disable;
1241 pins-miso {
1243 bias-pull-down;
1247 spi5_pins: spi5-default-pins {
1248 pins-bus {
1253 bias-disable;
1257 trackpad_pins: trackpad-default-pins {
1258 pins-int-n {
1260 input-enable;
1261 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
1265 touchscreen_pins: touchscreen-default-pins {
1266 pins-irq {
1268 input-enable;
1269 bias-pull-up;
1272 pins-reset {
1274 output-high;
1277 pins-report-sw {
1279 output-low;
1283 vow_clk_miso_off_pins: vow-clk-miso-off-pins {
1284 pins-miso-off {
1289 vow_clk_miso_on_pins: vow-clk-miso-on-pins {
1290 pins-miso-on {
1295 vow_dat_miso_off_pins: vow-dat-miso-off-pins {
1296 pins-miso-off {
1301 vow_dat_miso_on_pins: vow-dat-miso-on-pins {
1302 pins-miso-on {
1309 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
1315 pinctrl-names = "default";
1316 pinctrl-0 = <&pwm0_pins>;
1322 firmware-name = "mediatek/mt8192/scp.img";
1323 memory-region = <&scp_mem_reserved>;
1324 pinctrl-names = "default";
1325 pinctrl-0 = <&scp_pins>;
1327 cros-ec-rpmsg {
1328 compatible = "google,cros-ec-rpmsg";
1329 mediatek,rpmsg-name = "cros-ec-rpmsg";
1336 mediatek,pad-select = <0>;
1337 pinctrl-names = "default";
1338 pinctrl-0 = <&spi1_pins>;
1341 compatible = "google,cros-ec-spi";
1343 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
1344 spi-max-frequency = <3000000>;
1345 pinctrl-names = "default";
1346 pinctrl-0 = <&cros_ec_int>;
1347 wakeup-source;
1349 #address-cells = <1>;
1350 #size-cells = <0>;
1353 compatible = "google,cros-ec-pwm";
1354 #pwm-cells = <1>;
1359 i2c_tunnel: i2c-tunnel {
1360 compatible = "google,cros-ec-i2c-tunnel";
1361 google,remote-bus = <0>;
1362 #address-cells = <1>;
1363 #size-cells = <0>;
1367 compatible = "google,cros-ec-regulator";
1369 regulator-min-microvolt = <1800000>;
1370 regulator-max-microvolt = <3300000>;
1374 compatible = "google,cros-ec-regulator";
1376 regulator-min-microvolt = <3300000>;
1377 regulator-max-microvolt = <3300000>;
1381 compatible = "google,cros-ec-typec";
1382 #address-cells = <1>;
1383 #size-cells = <0>;
1386 compatible = "usb-c-connector";
1389 power-role = "dual";
1390 data-role = "host";
1391 try-power-role = "source";
1395 compatible = "usb-c-connector";
1398 power-role = "dual";
1399 data-role = "host";
1400 try-power-role = "source";
1409 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
1410 mediatek,pad-select = <0>;
1411 pinctrl-names = "default";
1412 pinctrl-0 = <&spi5_pins>;
1417 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
1418 spi-max-frequency = <1000000>;
1419 pinctrl-names = "default";
1420 pinctrl-0 = <&cr50_int>;
1425 #address-cells = <2>;
1426 #size-cells = <0>;
1429 compatible = "mediatek,mt6315-regulator";
1434 regulator-name = "Vbcpu";
1435 regulator-min-microvolt = <400000>;
1436 regulator-max-microvolt = <1193750>;
1437 regulator-enable-ramp-delay = <256>;
1438 regulator-allowed-modes = <0 1 2>;
1439 regulator-always-on;
1443 regulator-name = "Vlcpu";
1444 regulator-min-microvolt = <400000>;
1445 regulator-max-microvolt = <1193750>;
1446 regulator-enable-ramp-delay = <256>;
1447 regulator-allowed-modes = <0 1 2>;
1448 regulator-always-on;
1454 compatible = "mediatek,mt6315-regulator";
1459 regulator-name = "Vgpu";
1460 regulator-min-microvolt = <400000>;
1461 regulator-max-microvolt = <800000>;
1462 regulator-enable-ramp-delay = <256>;
1463 regulator-allowed-modes = <0 1 2>;
1464 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
1465 regulator-coupled-max-spread = <10000>;
1478 wakeup-source;
1479 vusb33-supply = <&pp3300_g>;
1480 vbus-supply = <&pp5000_a>;
1483 #include <arm/cros-ec-keyboard.dtsi>
1484 #include <arm/cros-ec-sbs.dtsi>