Lines Matching defs:pericfg
370 pericfg: clock-controller@10003000 {
371 compatible = "mediatek,mt8173-pericfg", "syscon";
679 clocks = <&pericfg CLK_PERI_AUXADC>;
689 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
699 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
709 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
719 clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
730 clocks = <&pericfg CLK_PERI_I2C0>,
731 <&pericfg CLK_PERI_AP_DMA>;
746 clocks = <&pericfg CLK_PERI_I2C1>,
747 <&pericfg CLK_PERI_AP_DMA>;
762 clocks = <&pericfg CLK_PERI_I2C2>,
763 <&pericfg CLK_PERI_AP_DMA>;
780 <&pericfg CLK_PERI_SPI0>;
790 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
792 resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
804 clocks = <&pericfg CLK_PERI_SPI>,
806 <&pericfg CLK_PERI_NFI>;
819 clocks = <&pericfg CLK_PERI_I2C3>,
820 <&pericfg CLK_PERI_AP_DMA>;
835 clocks = <&pericfg CLK_PERI_I2C4>,
836 <&pericfg CLK_PERI_AP_DMA>;
849 clocks = <&pericfg CLK_PERI_I2C5>;
859 clocks = <&pericfg CLK_PERI_I2C6>,
860 <&pericfg CLK_PERI_AP_DMA>;
905 clocks = <&pericfg CLK_PERI_MSDC30_0>,
915 clocks = <&pericfg CLK_PERI_MSDC30_1>,
925 clocks = <&pericfg CLK_PERI_MSDC30_2>,
935 clocks = <&pericfg CLK_PERI_MSDC30_3>,
953 mediatek,syscon-wakeup = <&pericfg 0x400 1>;