Lines Matching +full:0 +full:x4c0
18 #size-cells = <0>;
20 B53_0: cpu@0 {
23 reg = <0x0 0x0>;
31 reg = <0x0 0x1>;
61 #clock-cells = <0>;
67 #clock-cells = <0>;
81 ranges = <0x0 0x0 0x81000000 0x8000>;
87 reg = <0x1000 0x1000>, /* GICD */
88 <0x2000 0x2000>, /* GICC */
89 <0x4000 0x2000>, /* GICH */
90 <0x6000 0x2000>; /* GICV */
101 ranges = <0x0 0x0 0xff800000 0x400000>;
105 reg = <0x480 0x10>;
110 reg = <0x4c0 0x10>;
114 /* GPIOs 0 .. 31 */
117 reg = <0x500 0x04>, <0x520 0x04>;
127 reg = <0x504 0x04>, <0x524 0x04>;
137 reg = <0x508 0x04>, <0x528 0x04>;
147 reg = <0x50c 0x04>, <0x52c 0x04>;
157 reg = <0x510 0x04>, <0x530 0x04>;
167 reg = <0x514 0x04>, <0x534 0x04>;
177 reg = <0x518 0x04>, <0x538 0x04>;
187 reg = <0x51c 0x04>, <0x53c 0x04>;
196 reg = <0x640 0x18>;
205 reg = <0x660 0x18>;
214 #size-cells = <0>;
216 reg = <0x800 0xdc>;
222 reg = <0xb80 0x28>;
228 #size-cells = <0>;
229 compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0";
230 reg = <0x1000 0x600>;
240 #size-cells = <0>;
242 reg = <0x1800 0x600>, <0x2000 0x10>;
246 nandcs: nand@0 {
248 reg = <0>;
255 arm,primecell-periphid = <0x00041081>;
256 reg = <0x59000 0x1000>;