Lines Matching full:receiver
192 * Universal Asynchronous Receiver/Transmitter (UART) control registers
196 * Receiver/Transmitter (UART) Control Register 0
199 * Receiver/Transmitter (UART) Control Register 1
202 * Receiver/Transmitter (UART) Control Register 2
205 * Receiver/Transmitter (UART) Control Register 3
208 * Receiver/Transmitter (UART) Data Register
211 * Receiver/Transmitter (UART) Status Register 0
214 * Receiver/Transmitter (UART) Status Register 1 (read).
217 * Receiver/Transmitter (UART) Control Register 0
220 * Receiver/Transmitter (UART) Control Register 1
223 * Receiver/Transmitter (UART) Control Register 2
226 * Receiver/Transmitter (UART) Control Register 3
229 * Receiver/Transmitter (UART) Control Register 4
232 * Receiver/Transmitter (UART) Data Register
235 * Receiver/Transmitter (UART) Status Register 0
238 * Receiver/Transmitter (UART) Status Register 1 (read).
241 * Receiver/Transmitter (UART) Control Register 0
244 * Receiver/Transmitter (UART) Control Register 1
247 * Receiver/Transmitter (UART) Control Register 2
250 * Receiver/Transmitter (UART) Control Register 3
253 * Receiver/Transmitter (UART) Data Register
256 * Receiver/Transmitter (UART) Status Register 0
259 * Receiver/Transmitter (UART) Status Register 1 (read).
389 #define UTSR0_RID 0x00000004 /* Receiver IDle */
512 #define SDSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */
583 #define HSSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */