dts/rockchip/rv1108.dtsi

29 		#size-cells = <0>;
34 			reg = <0xf00>;
42 	cpu_opp_table: opp-table-0 {
84 		#clock-cells = <0>;
89 		reg = <0x10080000 0x2000>;
92 		ranges = <0 0x10080000 0x2000>;
97 		reg = <0x10210000 0x100>;
106 		pinctrl-0 = <&uart2m0_xfer>;
112 		reg = <0x10220000 0x100>;
121 		pinctrl-0 = <&uart1_xfer>;
127 		reg = <0x10230000 0x100>;
136 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
142 		reg = <0x10240000 0x1000>;
145 		#size-cells = <0>;
149 		pinctrl-0 = <&i2c1_xfer>;
156 		reg = <0x10250000 0x1000>;
159 		#size-cells = <0>;
163 		pinctrl-0 = <&i2c2m1_xfer>;
170 		reg = <0x10260000 0x1000>;
173 		#size-cells = <0>;
177 		pinctrl-0 = <&i2c3_xfer>;
184 		reg = <0x10270000 0x1000>;
191 		#size-cells = <0>;
197 		reg = <0x10280000 0x10>;
201 		pinctrl-0 = <&pwm4_pin>;
208 		reg = <0x10280010 0x10>;
212 		pinctrl-0 = <&pwm5_pin>;
219 		reg = <0x10280020 0x10>;
223 		pinctrl-0 = <&pwm6_pin>;
230 		reg = <0x10280030 0x10>;
234 		pinctrl-0 = <&pwm7_pin>;
241 		reg = <0x102a0000 0x4000>;
242 		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
252 		reg = <0x10300000 0x1000>;
263 			reg = <0x100 0x0c>;
266 			#clock-cells = <0>;
274 				#phy-cells = <0>;
281 				#phy-cells = <0>;
289 		reg = <0x10350000 0x20>;
297 		reg = <0x10360000 0x100>;
308 			thermal-sensors = <&tsadc 0>;
340 		reg = <0x10370000 0x100>;
347 		pinctrl-0 = <&otp_pin>;
359 		reg = <0x1038c000 0x100>;
369 		reg = <0x20000000 0x1000>;
372 		#size-cells = <0>;
376 		pinctrl-0 = <&i2c0_xfer>;
383 		reg = <0x20040000 0x10>;
387 		pinctrl-0 = <&pwm0_pin>;
394 		reg = <0x20040010 0x10>;
398 		pinctrl-0 = <&pwm1_pin>;
405 		reg = <0x20040020 0x10>;
409 		pinctrl-0 = <&pwm2_pin>;
416 		reg = <0x20040030 0x10>;
420 		pinctrl-0 = <&pwm3_pin>;
427 		reg = <0x20060000 0x1000>;
437 		reg = <0x202a0000 0x1000>;
442 		reg = <0x20200000 0x1000>;
452 		reg = <0x30100000  0x1000>;
463 		reg = <0x30110000 0x4000>;
468 		fifo-depth = <0x100>;
475 		reg = <0x30120000 0x4000>;
480 		fifo-depth = <0x100>;
487 		reg = <0x30130000 0x4000>;
492 		fifo-depth = <0x100>;
495 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
501 		reg = <0x30140000 0x20000>;
511 		reg = <0x30160000 0x20000>;
522 		reg = <0x30180000 0x40000>;
537 		reg = <0x301c0000 0x4000>;
541 		pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
548 		reg = <0x30200000 0x10000>;
563 		pinctrl-0 = <&rmii_pins>;
572 		#address-cells = <0>;
574 		reg = <0x32011000 0x1000>,
575 		      <0x32012000 0x2000>,
576 		      <0x32014000 0x2000>,
577 		      <0x32016000 0x2000>;
591 			reg = <0x20030000 0x100>;
604 			reg = <0x10310000 0x100>;
617 			reg = <0x10320000 0x100>;
630 			reg = <0x10330000 0x100>;
757 				rockchip,pins = <0 RK_PB1 1 &pcfg_pull_none_smt>,
758 						<0 RK_PB2 1 &pcfg_pull_none_smt>;
771 				rockchip,pins = <0 RK_PC2 2 &pcfg_pull_none>,
772 						<0 RK_PC6 3 &pcfg_pull_none>;
776 				rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
777 						<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
795 				rockchip,pins = <0 RK_PB6 1 &pcfg_pull_none>,
796 						<0 RK_PC4 2 &pcfg_pull_none>;
802 				rockchip,pins = <0 RK_PC5 1 &pcfg_pull_none>;
808 				rockchip,pins = <0 RK_PC4 1 &pcfg_pull_none>;
814 				rockchip,pins = <0 RK_PC6 1 &pcfg_pull_none>;
820 				rockchip,pins = <0 RK_PC0 1 &pcfg_pull_none>;
858 				rockchip,pins = <0 RK_PA1 1 &pcfg_pull_up_drv_4ma>;
893 				rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
897 				rockchip,pins = <0 RK_PA4 1 &pcfg_pull_up>;
901 				rockchip,pins = <0 RK_PB0 1 &pcfg_pull_up>;
905 				rockchip,pins = <0 RK_PA7 1 &pcfg_pull_up>;
911 				rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>;
915 				rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;