Lines Matching refs:ARC
6 config ARC config
86 menu "ARC Architecture Configuration"
88 menu "ARC Platform/SoC/Board"
97 prompt "ARC Instruction Set"
104 The original ARC ISA of ARC600/700 cores
107 bool "ARC ISA v2"
110 ISA for the Next Generation ARC-HS cores
114 menu "ARC CPU Configuration"
117 prompt "ARC Core"
133 bool "ARC-HS"
136 Support for ARC HS38x Cores based on ARCv2 ISA
165 Build kernel for Big Endian Mode of ARC CPU
196 This IP block enables SMP in ARC-HS38 cores.
323 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
349 The ARC HS architecture supports unaligned memory access
437 endmenu # "ARC CPU Configuration"
466 With ARC 2G:2G address split, only upper 2G is directly addressable by
478 ARC cores with 40 bit Physical Addressing support
522 bool "ARC debugging"
545 Enable paranoid checks and self-test of both ARC-specific and generic
555 endmenu # "ARC Architecture Configuration"