Lines Matching full:assigned

44   assigned-clocks:
47   assigned-clock-parents:
50   assigned-clock-rates:
123   - assigned-clocks
124   - assigned-clock-parents
140         assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
141         assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
177             assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
178             assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
179             assigned-clock-rates = <1536000>;
188             assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
189             assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
190             assigned-clock-rates = <3072000>;