Lines Matching +full:sdm845 +full:- +full:camcc
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
17 const: qcom,sdm845-camss
23 clock-names:
25 - const: camnoc_axi
26 - const: cpas_ahb
27 - const: cphy_rx_src
28 - const: csi0
29 - const: csi0_src
30 - const: csi1
31 - const: csi1_src
32 - const: csi2
33 - const: csi2_src
34 - const: csiphy0
35 - const: csiphy0_timer
36 - const: csiphy0_timer_src
37 - const: csiphy1
38 - const: csiphy1_timer
39 - const: csiphy1_timer_src
40 - const: csiphy2
41 - const: csiphy2_timer
42 - const: csiphy2_timer_src
43 - const: csiphy3
44 - const: csiphy3_timer
45 - const: csiphy3_timer_src
46 - const: gcc_camera_ahb
47 - const: gcc_camera_axi
48 - const: slow_ahb_src
49 - const: soc_ahb
50 - const: vfe0_axi
51 - const: vfe0
52 - const: vfe0_cphy_rx
53 - const: vfe0_src
54 - const: vfe1_axi
55 - const: vfe1
56 - const: vfe1_cphy_rx
57 - const: vfe1_src
58 - const: vfe_lite
59 - const: vfe_lite_cphy_rx
60 - const: vfe_lite_src
66 interrupt-names:
68 - const: csid0
69 - const: csid1
70 - const: csid2
71 - const: csiphy0
72 - const: csiphy1
73 - const: csiphy2
74 - const: csiphy3
75 - const: vfe0
76 - const: vfe1
77 - const: vfe_lite
82 power-domains:
84 - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
85 - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
86 - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
96 $ref: /schemas/graph.yaml#/$defs/port-base
103 $ref: video-interfaces.yaml#
107 data-lanes:
111 bus-type:
113 - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
114 - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
117 - data-lanes
120 $ref: /schemas/graph.yaml#/$defs/port-base
127 $ref: video-interfaces.yaml#
131 data-lanes:
135 bus-type:
137 - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
138 - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
141 - data-lanes
144 $ref: /schemas/graph.yaml#/$defs/port-base
151 $ref: video-interfaces.yaml#
155 data-lanes:
159 bus-type:
161 - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
162 - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
165 - data-lanes
168 $ref: /schemas/graph.yaml#/$defs/port-base
175 $ref: video-interfaces.yaml#
179 data-lanes:
183 bus-type:
185 - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
186 - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
189 - data-lanes
195 reg-names:
197 - const: csid0
198 - const: csid1
199 - const: csid2
200 - const: csiphy0
201 - const: csiphy1
202 - const: csiphy2
203 - const: csiphy3
204 - const: vfe0
205 - const: vfe1
206 - const: vfe_lite
208 vdda-phy-supply:
212 vdda-pll-supply:
217 - clock-names
218 - clocks
219 - compatible
220 - interrupt-names
221 - interrupts
222 - iommus
223 - power-domains
224 - reg
225 - reg-names
226 - vdda-phy-supply
227 - vdda-pll-supply
232 - |
233 #include <dt-bindings/interrupt-controller/arm-gic.h>
234 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
235 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
238 #address-cells = <2>;
239 #size-cells = <2>;
242 compatible = "qcom,sdm845-camss";
281 clock-names = "camnoc_axi",
329 interrupt-names = "csid0",
345 power-domains = <&clock_camcc IFE_0_GDSC>,
360 reg-names = "csid0",
371 vdda-phy-supply = <&vreg_l1a_0p875>;
372 vdda-pll-supply = <&vreg_l26a_1p2>;
375 #address-cells = <1>;
376 #size-cells = <0>;