Lines Matching +full:mt8192 +full:- +full:power
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8192-disp-postmask
26 - items:
27 - enum:
28 - mediatek,mt8186-disp-postmask
29 - mediatek,mt8188-disp-postmask
30 - const: mediatek,mt8192-disp-postmask
38 power-domains:
40 the power controller specified by phandle. See
41 Documentation/devicetree/bindings/power/power-domain.yaml for details.
45 - description: POSTMASK Clock
47 mediatek,gce-client-reg:
51 defined in the header include/dt-bindings/gce/<chip>-gce.h.
52 $ref: /schemas/types.yaml#/definitions/phandle-array
73 - port@0
74 - port@1
77 - compatible
78 - reg
79 - interrupts
80 - power-domains
81 - clocks
86 - |
87 #include <dt-bindings/interrupt-controller/arm-gic.h>
88 #include <dt-bindings/clock/mt8192-clk.h>
89 #include <dt-bindings/power/mt8192-power.h>
90 #include <dt-bindings/gce/mt8192-gce.h>
93 #address-cells = <2>;
94 #size-cells = <2>;
97 compatible = "mediatek,mt8192-disp-postmask";
100 power-domains = <&scpsys MT8192_POWER_DOMAIN_DISP>;
102 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;