accel/amdxdna/amdnpu.rst

34 partition which can be bound to a workload context.
55 XDNA Array partition setup, XDNA Array configuration, workload context
56 management and workload orchestration.
59 called ERT to service each workload context. ERT is also used to execute user
60 provided ``ctrlcode`` associated with the workload context.
74 workload context. The user channel is primarily used for submitting work to
125 may be *exclusively* bound to one workload context while another partition may
126 be *temporarily* bound to more than one workload contexts. The microcontroller
134 of 2D array among various workloads. Every workload describes the number
136 component uses hints passed by the workload and its own heuristics to
141 AMD Phoenix and AMD Hawk Point client NPU can support 6 concurrent workload
142 contexts. AMD Strix Point can support 16 concurrent workload contexts.
148 A NPU application workload is comprised of two separate binaries which are
154    spatial partition bound to the workload by the associated ERT instance.
160    the microcontroller in the context of the workload. ``ctrlcode`` is made up
171 Every workload context uses a host resident 64 MB buffer which is memory
172 mapped into the ERT instance created to service the workload. The ``ctrlcode``
173 used by the workload is copied into this special memory. This buffer is
174 protected by PASID like all other input/output buffers used by that workload.
175 Instruction buffer is also mapped into the user space of the workload.
188 Here are the steps to run a workload on AMD NPU:
190 1.  Compile the workload into an overlay and a ``ctrlcode`` binary.
193     for the workload.
207     signal to the driver which then wakes up the waiting workload.
257 workload context and sends an asynchronous message to the driver over the
259 the register states for the partition bound to faulting workload context. The