bpf/progs/verifier_sdiv.c

1 // SPDX-License-Identifier: GPL-2.0
14 __description("SDIV32, non-zero imm divisor, check 1")
15 __success __success_unpriv __retval(-20)
19 	w0 = -41;					\  in sdiv32_non_zero_imm_1()
26 __description("SDIV32, non-zero imm divisor, check 2")
27 __success __success_unpriv __retval(-20)
32 	w0 s/= -2;					\  in sdiv32_non_zero_imm_2()
38 __description("SDIV32, non-zero imm divisor, check 3")
43 	w0 = -41;					\  in sdiv32_non_zero_imm_3()
44 	w0 s/= -2;					\  in sdiv32_non_zero_imm_3()
50 __description("SDIV32, non-zero imm divisor, check 4")
51 __success __success_unpriv __retval(-21)
55 	w0 = -42;					\  in sdiv32_non_zero_imm_4()
62 __description("SDIV32, non-zero imm divisor, check 5")
63 __success __success_unpriv __retval(-21)
68 	w0 s/= -2;					\  in sdiv32_non_zero_imm_5()
74 __description("SDIV32, non-zero imm divisor, check 6")
79 	w0 = -42;					\  in sdiv32_non_zero_imm_6()
80 	w0 s/= -2;					\  in sdiv32_non_zero_imm_6()
86 __description("SDIV32, non-zero imm divisor, check 7")
98 __description("SDIV32, non-zero imm divisor, check 8")
110 __description("SDIV32, non-zero reg divisor, check 1")
111 __success __success_unpriv __retval(-20)
115 	w0 = -41;					\  in sdiv32_non_zero_reg_1()
123 __description("SDIV32, non-zero reg divisor, check 2")
124 __success __success_unpriv __retval(-20)
129 	w1 = -2;					\  in sdiv32_non_zero_reg_2()
136 __description("SDIV32, non-zero reg divisor, check 3")
141 	w0 = -41;					\  in sdiv32_non_zero_reg_3()
142 	w1 = -2;					\  in sdiv32_non_zero_reg_3()
149 __description("SDIV32, non-zero reg divisor, check 4")
150 __success __success_unpriv __retval(-21)
154 	w0 = -42;					\  in sdiv32_non_zero_reg_4()
162 __description("SDIV32, non-zero reg divisor, check 5")
163 __success __success_unpriv __retval(-21)
168 	w1 = -2;					\  in sdiv32_non_zero_reg_5()
175 __description("SDIV32, non-zero reg divisor, check 6")
180 	w0 = -42;					\  in sdiv32_non_zero_reg_6()
181 	w1 = -2;					\  in sdiv32_non_zero_reg_6()
188 __description("SDIV32, non-zero reg divisor, check 7")
201 __description("SDIV32, non-zero reg divisor, check 8")
214 __description("SDIV64, non-zero imm divisor, check 1")
215 __success __success_unpriv __retval(-20)
219 	r0 = -41;					\  in sdiv64_non_zero_imm_1()
226 __description("SDIV64, non-zero imm divisor, check 2")
227 __success __success_unpriv __retval(-20)
232 	r0 s/= -2;					\  in sdiv64_non_zero_imm_2()
238 __description("SDIV64, non-zero imm divisor, check 3")
243 	r0 = -41;					\  in sdiv64_non_zero_imm_3()
244 	r0 s/= -2;					\  in sdiv64_non_zero_imm_3()
250 __description("SDIV64, non-zero imm divisor, check 4")
251 __success __success_unpriv __retval(-21)
255 	r0 = -42;					\  in sdiv64_non_zero_imm_4()
262 __description("SDIV64, non-zero imm divisor, check 5")
263 __success __success_unpriv __retval(-21)
268 	r0 s/= -2;					\  in sdiv64_non_zero_imm_5()
274 __description("SDIV64, non-zero imm divisor, check 6")
279 	r0 = -42;					\  in sdiv64_non_zero_imm_6()
280 	r0 s/= -2;					\  in sdiv64_non_zero_imm_6()
286 __description("SDIV64, non-zero reg divisor, check 1")
287 __success __success_unpriv __retval(-20)
291 	r0 = -41;					\  in sdiv64_non_zero_reg_1()
299 __description("SDIV64, non-zero reg divisor, check 2")
300 __success __success_unpriv __retval(-20)
305 	r1 = -2;					\  in sdiv64_non_zero_reg_2()
312 __description("SDIV64, non-zero reg divisor, check 3")
317 	r0 = -41;					\  in sdiv64_non_zero_reg_3()
318 	r1 = -2;					\  in sdiv64_non_zero_reg_3()
325 __description("SDIV64, non-zero reg divisor, check 4")
326 __success __success_unpriv __retval(-21)
330 	r0 = -42;					\  in sdiv64_non_zero_reg_4()
338 __description("SDIV64, non-zero reg divisor, check 5")
339 __success __success_unpriv __retval(-21)
344 	r1 = -2;					\  in sdiv64_non_zero_reg_5()
351 __description("SDIV64, non-zero reg divisor, check 6")
356 	r0 = -42;					\  in sdiv64_non_zero_reg_6()
357 	r1 = -2;					\  in sdiv64_non_zero_reg_6()
364 __description("SMOD32, non-zero imm divisor, check 1")
365 __success __success_unpriv __retval(-1)
369 	w0 = -41;					\  in smod32_non_zero_imm_1()
376 __description("SMOD32, non-zero imm divisor, check 2")
382 	w0 s%%= -2;					\  in smod32_non_zero_imm_2()
388 __description("SMOD32, non-zero imm divisor, check 3")
389 __success __success_unpriv __retval(-1)
393 	w0 = -41;					\  in smod32_non_zero_imm_3()
394 	w0 s%%= -2;					\  in smod32_non_zero_imm_3()
400 __description("SMOD32, non-zero imm divisor, check 4")
405 	w0 = -42;					\  in smod32_non_zero_imm_4()
412 __description("SMOD32, non-zero imm divisor, check 5")
418 	w0 s%%= -2;					\  in smod32_non_zero_imm_5()
424 __description("SMOD32, non-zero imm divisor, check 6")
429 	w0 = -42;					\  in smod32_non_zero_imm_6()
430 	w0 s%%= -2;					\  in smod32_non_zero_imm_6()
436 __description("SMOD32, non-zero reg divisor, check 1")
437 __success __success_unpriv __retval(-1)
441 	w0 = -41;					\  in smod32_non_zero_reg_1()
449 __description("SMOD32, non-zero reg divisor, check 2")
455 	w1 = -2;					\  in smod32_non_zero_reg_2()
462 __description("SMOD32, non-zero reg divisor, check 3")
463 __success __success_unpriv __retval(-1)
467 	w0 = -41;					\  in smod32_non_zero_reg_3()
468 	w1 = -2;					\  in smod32_non_zero_reg_3()
475 __description("SMOD32, non-zero reg divisor, check 4")
480 	w0 = -42;					\  in smod32_non_zero_reg_4()
488 __description("SMOD32, non-zero reg divisor, check 5")
494 	w1 = -2;					\  in smod32_non_zero_reg_5()
501 __description("SMOD32, non-zero reg divisor, check 6")
506 	w0 = -42;					\  in smod32_non_zero_reg_6()
507 	w1 = -2;					\  in smod32_non_zero_reg_6()
514 __description("SMOD64, non-zero imm divisor, check 1")
515 __success __success_unpriv __retval(-1)
519 	r0 = -41;					\  in smod64_non_zero_imm_1()
526 __description("SMOD64, non-zero imm divisor, check 2")
532 	r0 s%%= -2;					\  in smod64_non_zero_imm_2()
538 __description("SMOD64, non-zero imm divisor, check 3")
539 __success __success_unpriv __retval(-1)
543 	r0 = -41;					\  in smod64_non_zero_imm_3()
544 	r0 s%%= -2;					\  in smod64_non_zero_imm_3()
550 __description("SMOD64, non-zero imm divisor, check 4")
555 	r0 = -42;					\  in smod64_non_zero_imm_4()
562 __description("SMOD64, non-zero imm divisor, check 5")
563 __success __success_unpriv __retval(-0)
568 	r0 s%%= -2;					\  in smod64_non_zero_imm_5()
574 __description("SMOD64, non-zero imm divisor, check 6")
579 	r0 = -42;					\  in smod64_non_zero_imm_6()
580 	r0 s%%= -2;					\  in smod64_non_zero_imm_6()
586 __description("SMOD64, non-zero imm divisor, check 7")
598 __description("SMOD64, non-zero imm divisor, check 8")
610 __description("SMOD64, non-zero reg divisor, check 1")
611 __success __success_unpriv __retval(-1)
615 	r0 = -41;					\  in smod64_non_zero_reg_1()
623 __description("SMOD64, non-zero reg divisor, check 2")
629 	r1 = -2;					\  in smod64_non_zero_reg_2()
636 __description("SMOD64, non-zero reg divisor, check 3")
637 __success __success_unpriv __retval(-1)
641 	r0 = -41;					\  in smod64_non_zero_reg_3()
642 	r1 = -2;					\  in smod64_non_zero_reg_3()
649 __description("SMOD64, non-zero reg divisor, check 4")
654 	r0 = -42;					\  in smod64_non_zero_reg_4()
662 __description("SMOD64, non-zero reg divisor, check 5")
668 	r1 = -2;					\  in smod64_non_zero_reg_5()
675 __description("SMOD64, non-zero reg divisor, check 6")
680 	r0 = -42;					\  in smod64_non_zero_reg_6()
681 	r1 = -2;					\  in smod64_non_zero_reg_6()
688 __description("SMOD64, non-zero reg divisor, check 7")
701 __description("SMOD64, non-zero reg divisor, check 8")
714 __description("SDIV32, zero divisor")
721 	w2 = -1;					\  in sdiv32_zero_divisor()
729 __description("SDIV64, zero divisor")
736 	r2 = -1;					\  in sdiv64_zero_divisor()
744 __description("SMOD32, zero divisor")
745 __success __success_unpriv __retval(-1)
751 	w2 = -1;					\  in smod32_zero_divisor()
759 __description("SMOD64, zero divisor")
760 __success __success_unpriv __retval(-1)
766 	r2 = -1;					\  in smod64_zero_divisor()