Lines Matching +full:point +full:- +full:to +full:- +full:point

3 …riefDescription": "Counts once for most SIMD 128-bit packed computational double precision floatin…
6-bit packed computational double precision floating-point instructions retired; some instructions …
11 …riefDescription": "Counts once for most SIMD 128-bit packed computational single precision floatin…
14-bit packed computational single precision floating-point instructions retired; some instructions …
19 …riefDescription": "Counts once for most SIMD 256-bit packed double computational precision floatin…
22-bit packed double computational precision floating-point instructions retired; some instructions …
27 …riefDescription": "Counts once for most SIMD 256-bit packed single computational precision floatin…
30-bit packed single computational precision floating-point instructions retired; some instructions …
35-bit packed single and 256-bit packed double precision FP instructions retired; some instructions …
38-bit packed single precision and 256-bit packed double precision floating-point instructions reti…
43-bit packed double precision floating-point instructions retired; some instructions will count twi…
46-bit packed double precision floating-point instructions retired; some instructions will count twi…
51-bit packed single precision floating-point instructions retired; some instructions will count twi…
54-bit packed single precision floating-point instructions retired; some instructions will count twi…
59-bit packed single precision and 512-bit packed double precision FP instructions retired; some in…
62-bit packed single precision and 512-bit packed double precision floating-point instructions reti…
67 …"BriefDescription": "Counts once for most SIMD scalar computational floating-point instructions re…
70-point instructions retired; some instructions will count twice as noted below. Each count repres…
75 …"Counts once for most SIMD scalar computational double precision floating-point instructions retir…
78-point instructions retired; some instructions will count twice as noted below. Each count repres…
83 …"Counts once for most SIMD scalar computational single precision floating-point instructions retir…
86-point instructions retired; some instructions will count twice as noted below. Each count repres…
98 … "BriefDescription": "Intel AVX-512 computational 512-bit packed BFloat16 instructions retired.",
101 … "Counts once for each Intel AVX-512 computational 512-bit packed BFloat16 floating-point instruct…
106 … "BriefDescription": "Intel AVX-512 computational 128-bit packed BFloat16 instructions retired.",
109 … "Counts once for each Intel AVX-512 computational 128-bit packed BFloat16 floating-point instruct…
114 … "BriefDescription": "Intel AVX-512 computational 256-bit packed BFloat16 instructions retired.",
117 … "Counts once for each Intel AVX-512 computational 256-bit packed BFloat16 floating-point instruct…