Lines Matching +full:tx +full:- +full:slots
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Multi-channel Audio Serial Port Driver
7 * Author: Nirmal Pandey <n-pandey@ti.com>,
37 #include "edma-pcm.h"
38 #include "sdma-pcm.h"
39 #include "udma-pcm.h"
40 #include "davinci-mcasp.h"
134 void __iomem *reg = mcasp->base + offset; in mcasp_set_bits()
141 void __iomem *reg = mcasp->base + offset; in mcasp_clr_bits()
148 void __iomem *reg = mcasp->base + offset; in mcasp_mod_bits()
155 __raw_writel(val, mcasp->base + offset); in mcasp_set_reg()
160 return (u32)__raw_readl(mcasp->base + offset); in mcasp_get_reg()
170 /* loop count is to avoid the lock-up */ in mcasp_set_ctl_reg()
192 for_each_set_bit_from(bit, &mcasp->pdir, PIN_BIT_AFSR + 1) { in mcasp_set_clk_pdir()
204 for_each_set_bit(bit, &mcasp->pdir, PIN_BIT_AMUTE) { in mcasp_set_axr_pdir()
214 if (mcasp->rxnumevt) { /* enable FIFO */ in mcasp_start_rx()
215 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_start_rx()
227 * sure that the TX signlas are enabled when starting reception. in mcasp_start_rx()
247 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]); in mcasp_start_rx()
254 if (mcasp->txnumevt) { /* enable FIFO */ in mcasp_start_tx()
255 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_start_tx()
278 /* Release TX state machine */ in mcasp_start_tx()
285 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]); in mcasp_start_tx()
290 mcasp->streams++; in davinci_mcasp_start()
302 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]); in mcasp_stop_rx()
305 * In synchronous mode stop the TX clocks if no other stream is in mcasp_stop_rx()
308 if (mcasp_is_synchronous(mcasp) && !mcasp->streams) { in mcasp_stop_rx()
316 if (mcasp->rxnumevt) { /* disable FIFO */ in mcasp_stop_rx()
317 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_stop_rx()
329 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]); in mcasp_stop_tx()
332 * In synchronous mode keep TX clocks running if the capture stream is in mcasp_stop_tx()
335 if (mcasp_is_synchronous(mcasp) && mcasp->streams) in mcasp_stop_tx()
344 if (mcasp->txnumevt) { /* disable FIFO */ in mcasp_stop_tx()
345 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_stop_tx()
355 mcasp->streams--; in davinci_mcasp_stop()
367 u32 irq_mask = mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_tx_irq_handler()
373 dev_warn(mcasp->dev, "Transmit buffer underflow\n"); in davinci_mcasp_tx_irq_handler()
376 substream = mcasp->substreams[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_tx_irq_handler()
382 dev_warn(mcasp->dev, "unhandled tx event. txstat: 0x%08x\n", in davinci_mcasp_tx_irq_handler()
398 u32 irq_mask = mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_rx_irq_handler()
404 dev_warn(mcasp->dev, "Receive buffer overflow\n"); in davinci_mcasp_rx_irq_handler()
407 substream = mcasp->substreams[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_rx_irq_handler()
413 dev_warn(mcasp->dev, "unhandled rx event. rxstat: 0x%08x\n", in davinci_mcasp_rx_irq_handler()
430 if (mcasp->substreams[SNDRV_PCM_STREAM_PLAYBACK]) in davinci_mcasp_common_irq_handler()
433 if (mcasp->substreams[SNDRV_PCM_STREAM_CAPTURE]) in davinci_mcasp_common_irq_handler()
451 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_set_dai_fmt()
467 /* configure a full-word SYNC pulse (LRCLK) */ in davinci_mcasp_set_dai_fmt()
477 /* configure a full-word SYNC pulse (LRCLK) */ in davinci_mcasp_set_dai_fmt()
484 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
503 set_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
504 set_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
506 set_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
507 set_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
509 mcasp->bclk_master = 1; in davinci_mcasp_set_dai_fmt()
520 set_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
521 set_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
523 clear_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
524 clear_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
526 mcasp->bclk_master = 1; in davinci_mcasp_set_dai_fmt()
537 clear_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
538 clear_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
540 set_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
541 set_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
543 mcasp->bclk_master = 0; in davinci_mcasp_set_dai_fmt()
554 clear_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
555 clear_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
557 clear_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
558 clear_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
560 mcasp->bclk_master = 0; in davinci_mcasp_set_dai_fmt()
563 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
589 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
604 mcasp->dai_fmt = fmt; in davinci_mcasp_set_dai_fmt()
606 pm_runtime_put(mcasp->dev); in davinci_mcasp_set_dai_fmt()
613 pm_runtime_get_sync(mcasp->dev); in __davinci_mcasp_set_clkdiv()
617 AHCLKXDIV(div - 1), AHCLKXDIV_MASK); in __davinci_mcasp_set_clkdiv()
619 AHCLKRDIV(div - 1), AHCLKRDIV_MASK); in __davinci_mcasp_set_clkdiv()
624 ACLKXDIV(div - 1), ACLKXDIV_MASK); in __davinci_mcasp_set_clkdiv()
626 ACLKRDIV(div - 1), ACLKRDIV_MASK); in __davinci_mcasp_set_clkdiv()
628 mcasp->bclk_div = div; in __davinci_mcasp_set_clkdiv()
633 * BCLK/LRCLK ratio descries how many bit-clock cycles in __davinci_mcasp_set_clkdiv()
637 * of tdm-slots (for I2S - divided by 2). in __davinci_mcasp_set_clkdiv()
640 * number of configured tdm slots. in __davinci_mcasp_set_clkdiv()
642 mcasp->slot_width = div / mcasp->tdm_slots; in __davinci_mcasp_set_clkdiv()
643 if (div % mcasp->tdm_slots) in __davinci_mcasp_set_clkdiv()
644 dev_warn(mcasp->dev, in __davinci_mcasp_set_clkdiv()
645 "%s(): BCLK/LRCLK %d is not divisible by %d tdm slots", in __davinci_mcasp_set_clkdiv()
646 __func__, div, mcasp->tdm_slots); in __davinci_mcasp_set_clkdiv()
650 return -EINVAL; in __davinci_mcasp_set_clkdiv()
653 pm_runtime_put(mcasp->dev); in __davinci_mcasp_set_clkdiv()
670 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_set_sysclk()
679 clear_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
686 set_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
689 dev_err(mcasp->dev, "Invalid clk id: %d\n", clk_id); in davinci_mcasp_set_sysclk()
696 set_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
700 * the same clock - coming via AUXCLK. in davinci_mcasp_set_sysclk()
702 mcasp->sysclk_freq = freq; in davinci_mcasp_set_sysclk()
704 pm_runtime_put(mcasp->dev); in davinci_mcasp_set_sysclk()
712 struct snd_pcm_hw_constraint_list *cl = &mcasp->chconstr[stream]; in davinci_mcasp_ch_constraint()
713 unsigned int *list = (unsigned int *) cl->list; in davinci_mcasp_ch_constraint()
714 int slots = mcasp->tdm_slots; in davinci_mcasp_ch_constraint() local
717 if (mcasp->tdm_mask[stream]) in davinci_mcasp_ch_constraint()
718 slots = hweight32(mcasp->tdm_mask[stream]); in davinci_mcasp_ch_constraint()
720 for (i = 1; i <= slots; i++) in davinci_mcasp_ch_constraint()
724 list[count++] = i*slots; in davinci_mcasp_ch_constraint()
726 cl->count = count; in davinci_mcasp_ch_constraint()
735 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_set_ch_constraints()
736 if (mcasp->serial_dir[i] == TX_MODE) in davinci_mcasp_set_ch_constraints()
738 else if (mcasp->serial_dir[i] == RX_MODE) in davinci_mcasp_set_ch_constraints()
756 int slots, int slot_width) in davinci_mcasp_set_tdm_slot() argument
760 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_set_tdm_slot()
763 dev_dbg(mcasp->dev, in davinci_mcasp_set_tdm_slot()
764 "%s() tx_mask 0x%08x rx_mask 0x%08x slots %d width %d\n", in davinci_mcasp_set_tdm_slot()
765 __func__, tx_mask, rx_mask, slots, slot_width); in davinci_mcasp_set_tdm_slot()
767 if (tx_mask >= (1<<slots) || rx_mask >= (1<<slots)) { in davinci_mcasp_set_tdm_slot()
768 dev_err(mcasp->dev, in davinci_mcasp_set_tdm_slot()
769 "Bad tdm mask tx: 0x%08x rx: 0x%08x slots %d\n", in davinci_mcasp_set_tdm_slot()
770 tx_mask, rx_mask, slots); in davinci_mcasp_set_tdm_slot()
771 return -EINVAL; in davinci_mcasp_set_tdm_slot()
776 dev_err(mcasp->dev, "%s: Unsupported slot_width %d\n", in davinci_mcasp_set_tdm_slot()
778 return -EINVAL; in davinci_mcasp_set_tdm_slot()
781 mcasp->tdm_slots = slots; in davinci_mcasp_set_tdm_slot()
782 mcasp->tdm_mask[SNDRV_PCM_STREAM_PLAYBACK] = tx_mask; in davinci_mcasp_set_tdm_slot()
783 mcasp->tdm_mask[SNDRV_PCM_STREAM_CAPTURE] = rx_mask; in davinci_mcasp_set_tdm_slot()
784 mcasp->slot_width = slot_width; in davinci_mcasp_set_tdm_slot()
794 u32 mask = (1ULL << sample_width) - 1; in davinci_config_channel_size()
796 if (mcasp->slot_width) in davinci_config_channel_size()
797 slot_width = mcasp->slot_width; in davinci_config_channel_size()
798 else if (mcasp->max_format_width) in davinci_config_channel_size()
799 slot_width = mcasp->max_format_width; in davinci_config_channel_size()
803 * TX rotation: in davinci_config_channel_size()
809 * left aligned formats: rotate w/ (slot_width - sample_width) in davinci_config_channel_size()
811 if ((mcasp->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) == in davinci_config_channel_size()
817 rx_rotate = (slot_width - sample_width) / 4; in davinci_config_channel_size()
820 /* mapping of the XSSZ bit-field as described in the datasheet */ in davinci_config_channel_size()
821 fmt = (slot_width >> 1) - 1; in davinci_config_channel_size()
823 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { in davinci_config_channel_size()
836 * 16 bit to 23-8 (TXROT=6, rotate 24 bits) in davinci_config_channel_size()
837 * 24 bit to 23-0 (TXROT=0, rotate 0 bits) in davinci_config_channel_size()
857 struct snd_dmaengine_dai_dma_data *dma_data = &mcasp->dma_data[stream]; in mcasp_common_hw_param()
861 u8 slots = mcasp->tdm_slots; in mcasp_common_hw_param() local
867 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in mcasp_common_hw_param()
870 max_active_serializers = DIV_ROUND_UP(channels, slots); in mcasp_common_hw_param()
873 if (mcasp->version < MCASP_VERSION_3) in mcasp_common_hw_param()
881 mcasp->active_serializers[SNDRV_PCM_STREAM_CAPTURE]; in mcasp_common_hw_param()
886 mcasp->active_serializers[SNDRV_PCM_STREAM_PLAYBACK]; in mcasp_common_hw_param()
890 for (i = 0; i < mcasp->num_serializer; i++) { in mcasp_common_hw_param()
892 mcasp->serial_dir[i]); in mcasp_common_hw_param()
893 if (mcasp->serial_dir[i] == TX_MODE && in mcasp_common_hw_param()
896 mcasp->dismod, DISMOD_MASK); in mcasp_common_hw_param()
897 set_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
899 } else if (mcasp->serial_dir[i] == RX_MODE && in mcasp_common_hw_param()
901 clear_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
908 if (mcasp->serial_dir[i] != INACTIVE_MODE) in mcasp_common_hw_param()
911 mcasp->dismod, DISMOD_MASK); in mcasp_common_hw_param()
912 clear_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
918 numevt = mcasp->txnumevt; in mcasp_common_hw_param()
919 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_common_hw_param()
922 numevt = mcasp->rxnumevt; in mcasp_common_hw_param()
923 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_common_hw_param()
927 dev_warn(mcasp->dev, "stream has more channels (%d) than are " in mcasp_common_hw_param()
929 active_serializers * slots); in mcasp_common_hw_param()
930 return -EINVAL; in mcasp_common_hw_param()
943 dma_data->maxburst = active_serializers; in mcasp_common_hw_param()
945 dma_data->maxburst = 0; in mcasp_common_hw_param()
952 dev_err(mcasp->dev, "Invalid combination of period words and " in mcasp_common_hw_param()
955 return -EINVAL; in mcasp_common_hw_param()
966 numevt -= active_serializers; in mcasp_common_hw_param()
976 dma_data->maxburst = numevt; in mcasp_common_hw_param()
979 mcasp->active_serializers[stream] = active_serializers; in mcasp_common_hw_param()
993 total_slots = mcasp->tdm_slots; in mcasp_i2s_hw_param()
998 * cope with the transaction using just as many slots as there in mcasp_i2s_hw_param()
1001 if (mcasp->tdm_mask[stream]) { in mcasp_i2s_hw_param()
1002 active_slots = hweight32(mcasp->tdm_mask[stream]); in mcasp_i2s_hw_param()
1007 if ((1 << i) & mcasp->tdm_mask[stream]) { in mcasp_i2s_hw_param()
1009 if (--active_slots <= 0) in mcasp_i2s_hw_param()
1026 if (!mcasp->dat_port) in mcasp_i2s_hw_param()
1040 * If McASP is set to be TX/RX synchronous and the playback is in mcasp_i2s_hw_param()
1041 * not running already we need to configure the TX slots in in mcasp_i2s_hw_param()
1044 if (mcasp_is_synchronous(mcasp) && !mcasp->channels) in mcasp_i2s_hw_param()
1056 u8 *cs_bytes = (u8 *)&mcasp->iec958_status; in mcasp_dit_hw_param()
1058 if (!mcasp->dat_port) in mcasp_dit_hw_param()
1063 /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */ in mcasp_dit_hw_param()
1068 /* Set the TX tdm : for all the slots */ in mcasp_dit_hw_param()
1071 /* Set the TX clock controls : div = 1 and internal */ in mcasp_dit_hw_param()
1107 dev_err(mcasp->dev, "unsupported sampling rate: %d\n", rate); in mcasp_dit_hw_param()
1108 return -EINVAL; in mcasp_dit_hw_param()
1111 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRA_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
1112 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRB_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
1140 dev_warn(mcasp->dev, "Too fast reference clock (%u)\n", in davinci_mcasp_calc_clk_div()
1147 ((sysclk_freq / div) - bclk_freq) > in davinci_mcasp_calc_clk_div()
1148 (bclk_freq - (sysclk_freq / (div+1)))) { in davinci_mcasp_calc_clk_div()
1150 rem = rem - bclk_freq; in davinci_mcasp_calc_clk_div()
1154 (int)bclk_freq)) / div - 1000000; in davinci_mcasp_calc_clk_div()
1158 dev_info(mcasp->dev, "Sample-rate is off by %d PPM\n", in davinci_mcasp_calc_clk_div()
1172 if (!mcasp->txnumevt) in davinci_mcasp_tx_delay()
1175 return mcasp_get_reg(mcasp, mcasp->fifo_base + MCASP_WFIFOSTS_OFFSET); in davinci_mcasp_tx_delay()
1180 if (!mcasp->rxnumevt) in davinci_mcasp_rx_delay()
1183 return mcasp_get_reg(mcasp, mcasp->fifo_base + MCASP_RFIFOSTS_OFFSET); in davinci_mcasp_rx_delay()
1193 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in davinci_mcasp_delay()
1203 return fifo_use / substream->runtime->channels; in davinci_mcasp_delay()
1243 printk(KERN_WARNING "davinci-mcasp: unsupported PCM format"); in davinci_mcasp_hw_params()
1244 return -EINVAL; in davinci_mcasp_hw_params()
1247 ret = davinci_mcasp_set_dai_fmt(cpu_dai, mcasp->dai_fmt); in davinci_mcasp_hw_params()
1255 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) { in davinci_mcasp_hw_params()
1256 int slots = mcasp->tdm_slots; in davinci_mcasp_hw_params() local
1261 if (mcasp->slot_width) in davinci_mcasp_hw_params()
1262 sbits = mcasp->slot_width; in davinci_mcasp_hw_params()
1264 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) in davinci_mcasp_hw_params()
1265 bclk_target = rate * sbits * slots; in davinci_mcasp_hw_params()
1269 davinci_mcasp_calc_clk_div(mcasp, mcasp->sysclk_freq, in davinci_mcasp_hw_params()
1273 ret = mcasp_common_hw_param(mcasp, substream->stream, in davinci_mcasp_hw_params()
1278 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_hw_params()
1281 ret = mcasp_i2s_hw_param(mcasp, substream->stream, in davinci_mcasp_hw_params()
1289 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_hw_params()
1290 mcasp->channels = channels; in davinci_mcasp_hw_params()
1291 if (!mcasp->max_format_width) in davinci_mcasp_hw_params()
1292 mcasp->max_format_width = word_length; in davinci_mcasp_hw_params()
1308 davinci_mcasp_start(mcasp, substream->stream); in davinci_mcasp_trigger()
1313 davinci_mcasp_stop(mcasp, substream->stream); in davinci_mcasp_trigger()
1317 ret = -EINVAL; in davinci_mcasp_trigger()
1326 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_slot_width()
1333 slot_width = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_slot_width()
1349 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_format_width()
1356 format_width = rd->mcasp->max_format_width; in davinci_mcasp_hw_rule_format_width()
1379 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_rate()
1383 int slots = rd->mcasp->tdm_slots; in davinci_mcasp_hw_rule_rate() local
1387 if (rd->mcasp->slot_width) in davinci_mcasp_hw_rule_rate()
1388 sbits = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_rate()
1395 uint bclk_freq = sbits * slots * in davinci_mcasp_hw_rule_rate()
1400 if (rd->mcasp->auxclk_fs_ratio) in davinci_mcasp_hw_rule_rate()
1402 rd->mcasp->auxclk_fs_ratio; in davinci_mcasp_hw_rule_rate()
1404 sysclk_freq = rd->mcasp->sysclk_freq; in davinci_mcasp_hw_rule_rate()
1406 ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, in davinci_mcasp_hw_rule_rate()
1418 dev_dbg(rd->mcasp->dev, in davinci_mcasp_hw_rule_rate()
1419 "Frequencies %d-%d -> %d-%d for %d sbits and %d tdm slots\n", in davinci_mcasp_hw_rule_rate()
1420 ri->min, ri->max, range.min, range.max, sbits, slots); in davinci_mcasp_hw_rule_rate()
1422 return snd_interval_refine(hw_param_interval(params, rule->var), in davinci_mcasp_hw_rule_rate()
1429 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_format()
1433 int slots = rd->mcasp->tdm_slots; in davinci_mcasp_hw_rule_format() local
1445 if (rd->mcasp->auxclk_fs_ratio) in davinci_mcasp_hw_rule_format()
1447 rd->mcasp->auxclk_fs_ratio; in davinci_mcasp_hw_rule_format()
1449 sysclk_freq = rd->mcasp->sysclk_freq; in davinci_mcasp_hw_rule_format()
1451 if (rd->mcasp->slot_width) in davinci_mcasp_hw_rule_format()
1452 sbits = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_format()
1454 ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, in davinci_mcasp_hw_rule_format()
1455 sbits * slots * rate, in davinci_mcasp_hw_rule_format()
1463 dev_dbg(rd->mcasp->dev, in davinci_mcasp_hw_rule_format()
1464 "%d possible sample format for %d Hz and %d tdm slots\n", in davinci_mcasp_hw_rule_format()
1465 count, rate, slots); in davinci_mcasp_hw_rule_format()
1489 &mcasp->ruledata[substream->stream]; in davinci_mcasp_startup()
1492 int tdm_slots = mcasp->tdm_slots; in davinci_mcasp_startup()
1495 if (mcasp->substreams[substream->stream]) in davinci_mcasp_startup()
1496 return -EBUSY; in davinci_mcasp_startup()
1498 mcasp->substreams[substream->stream] = substream; in davinci_mcasp_startup()
1500 if (mcasp->tdm_mask[substream->stream]) in davinci_mcasp_startup()
1501 tdm_slots = hweight32(mcasp->tdm_mask[substream->stream]); in davinci_mcasp_startup()
1503 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_startup()
1508 * number of serializers for the direction * tdm slots per serializer in davinci_mcasp_startup()
1510 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in davinci_mcasp_startup()
1515 for (i = 0; i < mcasp->num_serializer; i++) { in davinci_mcasp_startup()
1516 if (mcasp->serial_dir[i] == dir) in davinci_mcasp_startup()
1519 ruledata->serializers = max_channels; in davinci_mcasp_startup()
1520 ruledata->mcasp = mcasp; in davinci_mcasp_startup()
1529 if (mcasp->channels && mcasp->channels < max_channels && in davinci_mcasp_startup()
1530 ruledata->serializers == 1) in davinci_mcasp_startup()
1531 max_channels = mcasp->channels; in davinci_mcasp_startup()
1539 snd_pcm_hw_constraint_minmax(substream->runtime, in davinci_mcasp_startup()
1543 snd_pcm_hw_constraint_list(substream->runtime, in davinci_mcasp_startup()
1545 &mcasp->chconstr[substream->stream]); in davinci_mcasp_startup()
1547 if (mcasp->max_format_width) { in davinci_mcasp_startup()
1552 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1556 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1560 else if (mcasp->slot_width) { in davinci_mcasp_startup()
1562 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1566 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1575 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) { in davinci_mcasp_startup()
1576 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1580 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1583 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1587 SNDRV_PCM_HW_PARAM_RATE, -1); in davinci_mcasp_startup()
1592 snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1595 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, -1); in davinci_mcasp_startup()
1605 mcasp->substreams[substream->stream] = NULL; in davinci_mcasp_shutdown()
1606 mcasp->active_serializers[substream->stream] = 0; in davinci_mcasp_shutdown()
1608 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_shutdown()
1612 mcasp->channels = 0; in davinci_mcasp_shutdown()
1613 mcasp->max_format_width = 0; in davinci_mcasp_shutdown()
1620 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; in davinci_mcasp_iec958_info()
1621 uinfo->count = 1; in davinci_mcasp_iec958_info()
1632 memcpy(uctl->value.iec958.status, &mcasp->iec958_status, in davinci_mcasp_iec958_get()
1633 sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_get()
1644 memcpy(&mcasp->iec958_status, uctl->value.iec958.status, in davinci_mcasp_iec958_put()
1645 sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_put()
1656 memset(ucontrol->value.iec958.status, 0xff, sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_con_mask_get()
1680 unsigned char *cs = (u8 *)&mcasp->iec958_status; in davinci_mcasp_init_iec958_status()
1694 snd_soc_dai_dma_data_set(dai, stream, &mcasp->dma_data[stream]); in davinci_mcasp_dai_probe()
1696 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) { in davinci_mcasp_dai_probe()
1733 .name = "davinci-mcasp.0",
1753 .name = "davinci-mcasp.1",
1768 .name = "davinci-mcasp",
1806 .compatible = "ti,dm646x-mcasp-audio",
1810 .compatible = "ti,da830-mcasp-audio",
1814 .compatible = "ti,am33xx-mcasp-audio",
1818 .compatible = "ti,dra7-mcasp-audio",
1822 .compatible = "ti,omap4-mcasp-audio",
1831 struct device_node *node = pdev->dev.of_node; in mcasp_reparent_fck()
1843 dev_warn(&pdev->dev, "Update the bindings to use assigned-clocks!\n"); in mcasp_reparent_fck()
1845 gfclk = clk_get(&pdev->dev, "fck"); in mcasp_reparent_fck()
1847 dev_err(&pdev->dev, "failed to get fck\n"); in mcasp_reparent_fck()
1853 dev_err(&pdev->dev, "failed to get parent clock\n"); in mcasp_reparent_fck()
1860 dev_err(&pdev->dev, "failed to reparent fck\n"); in mcasp_reparent_fck()
1874 return of_property_read_bool(mcasp->dev->of_node, "gpio-controller"); in davinci_mcasp_have_gpiochip()
1883 struct device_node *np = pdev->dev.of_node; in davinci_mcasp_get_config()
1886 device_get_match_data(&pdev->dev); in davinci_mcasp_get_config()
1891 if (pdev->dev.platform_data) { in davinci_mcasp_get_config()
1892 pdata = pdev->dev.platform_data; in davinci_mcasp_get_config()
1893 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1896 pdata = devm_kmemdup(&pdev->dev, match_pdata, sizeof(*pdata), in davinci_mcasp_get_config()
1899 return -ENOMEM; in davinci_mcasp_get_config()
1901 dev_err(&pdev->dev, "No compatible match found\n"); in davinci_mcasp_get_config()
1902 return -EINVAL; in davinci_mcasp_get_config()
1905 if (of_property_read_u32(np, "op-mode", &val) == 0) { in davinci_mcasp_get_config()
1906 pdata->op_mode = val; in davinci_mcasp_get_config()
1908 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1912 if (of_property_read_u32(np, "tdm-slots", &val) == 0) { in davinci_mcasp_get_config()
1914 dev_err(&pdev->dev, "tdm-slots must be in rage [2-32]\n"); in davinci_mcasp_get_config()
1915 return -EINVAL; in davinci_mcasp_get_config()
1918 pdata->tdm_slots = val; in davinci_mcasp_get_config()
1919 } else if (pdata->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_get_config()
1920 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1924 of_serial_dir32 = of_get_property(np, "serial-dir", &val); in davinci_mcasp_get_config()
1927 u8 *of_serial_dir = devm_kzalloc(&pdev->dev, in davinci_mcasp_get_config()
1931 return -ENOMEM; in davinci_mcasp_get_config()
1936 pdata->num_serializer = val; in davinci_mcasp_get_config()
1937 pdata->serial_dir = of_serial_dir; in davinci_mcasp_get_config()
1939 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1943 if (of_property_read_u32(np, "tx-num-evt", &val) == 0) in davinci_mcasp_get_config()
1944 pdata->txnumevt = val; in davinci_mcasp_get_config()
1946 if (of_property_read_u32(np, "rx-num-evt", &val) == 0) in davinci_mcasp_get_config()
1947 pdata->rxnumevt = val; in davinci_mcasp_get_config()
1949 if (of_property_read_u32(np, "auxclk-fs-ratio", &val) == 0) in davinci_mcasp_get_config()
1950 mcasp->auxclk_fs_ratio = val; in davinci_mcasp_get_config()
1954 pdata->dismod = DISMOD_VAL(val); in davinci_mcasp_get_config()
1956 dev_warn(&pdev->dev, "Invalid dismod value: %u\n", val); in davinci_mcasp_get_config()
1957 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1960 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1964 mcasp->pdata = pdata; in davinci_mcasp_get_config()
1966 if (mcasp->missing_audio_param) { in davinci_mcasp_get_config()
1968 dev_dbg(&pdev->dev, "Missing DT parameter(s) for audio\n"); in davinci_mcasp_get_config()
1972 dev_err(&pdev->dev, "Insufficient DT parameter(s)\n"); in davinci_mcasp_get_config()
1973 return -ENODEV; in davinci_mcasp_get_config()
1976 mcasp->op_mode = pdata->op_mode; in davinci_mcasp_get_config()
1977 /* sanity check for tdm slots parameter */ in davinci_mcasp_get_config()
1978 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_get_config()
1979 if (pdata->tdm_slots < 2) { in davinci_mcasp_get_config()
1980 dev_warn(&pdev->dev, "invalid tdm slots: %d\n", in davinci_mcasp_get_config()
1981 pdata->tdm_slots); in davinci_mcasp_get_config()
1982 mcasp->tdm_slots = 2; in davinci_mcasp_get_config()
1983 } else if (pdata->tdm_slots > 32) { in davinci_mcasp_get_config()
1984 dev_warn(&pdev->dev, "invalid tdm slots: %d\n", in davinci_mcasp_get_config()
1985 pdata->tdm_slots); in davinci_mcasp_get_config()
1986 mcasp->tdm_slots = 32; in davinci_mcasp_get_config()
1988 mcasp->tdm_slots = pdata->tdm_slots; in davinci_mcasp_get_config()
1991 mcasp->tdm_slots = 32; in davinci_mcasp_get_config()
1994 mcasp->num_serializer = pdata->num_serializer; in davinci_mcasp_get_config()
1996 mcasp->context.xrsr_regs = devm_kcalloc(&pdev->dev, in davinci_mcasp_get_config()
1997 mcasp->num_serializer, sizeof(u32), in davinci_mcasp_get_config()
1999 if (!mcasp->context.xrsr_regs) in davinci_mcasp_get_config()
2000 return -ENOMEM; in davinci_mcasp_get_config()
2002 mcasp->serial_dir = pdata->serial_dir; in davinci_mcasp_get_config()
2003 mcasp->version = pdata->version; in davinci_mcasp_get_config()
2004 mcasp->txnumevt = pdata->txnumevt; in davinci_mcasp_get_config()
2005 mcasp->rxnumevt = pdata->rxnumevt; in davinci_mcasp_get_config()
2006 mcasp->dismod = pdata->dismod; in davinci_mcasp_get_config()
2024 if (!mcasp->dev->of_node) in davinci_mcasp_get_dma_type()
2027 tmp = mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data; in davinci_mcasp_get_dma_type()
2028 chan = dma_request_chan(mcasp->dev, tmp); in davinci_mcasp_get_dma_type()
2030 return dev_err_probe(mcasp->dev, PTR_ERR(chan), in davinci_mcasp_get_dma_type()
2032 if (WARN_ON(!chan->device || !chan->device->dev)) { in davinci_mcasp_get_dma_type()
2034 return -EINVAL; in davinci_mcasp_get_dma_type()
2037 if (chan->device->dev->of_node) in davinci_mcasp_get_dma_type()
2038 ret = of_property_read_string(chan->device->dev->of_node, in davinci_mcasp_get_dma_type()
2041 dev_dbg(mcasp->dev, "DMA controller has no of-node\n"); in davinci_mcasp_get_dma_type()
2047 dev_dbg(mcasp->dev, "DMA controller compatible = \"%s\"\n", tmp); in davinci_mcasp_get_dma_type()
2063 if (pdata->version != MCASP_VERSION_4) in davinci_mcasp_txdma_offset()
2064 return pdata->tx_dma_offset; in davinci_mcasp_txdma_offset()
2066 for (i = 0; i < pdata->num_serializer; i++) { in davinci_mcasp_txdma_offset()
2067 if (pdata->serial_dir[i] == TX_MODE) { in davinci_mcasp_txdma_offset()
2086 if (pdata->version != MCASP_VERSION_4) in davinci_mcasp_rxdma_offset()
2087 return pdata->rx_dma_offset; in davinci_mcasp_rxdma_offset()
2089 for (i = 0; i < pdata->num_serializer; i++) { in davinci_mcasp_rxdma_offset()
2090 if (pdata->serial_dir[i] == RX_MODE) { in davinci_mcasp_rxdma_offset()
2109 if (mcasp->num_serializer && offset < mcasp->num_serializer && in davinci_mcasp_gpio_request()
2110 mcasp->serial_dir[offset] != INACTIVE_MODE) { in davinci_mcasp_gpio_request()
2111 dev_err(mcasp->dev, "AXR%u pin is used for audio\n", offset); in davinci_mcasp_gpio_request()
2112 return -EBUSY; in davinci_mcasp_gpio_request()
2116 return pm_runtime_resume_and_get(mcasp->dev); in davinci_mcasp_gpio_request()
2129 pm_runtime_put_sync(mcasp->dev); in davinci_mcasp_gpio_free()
2218 .base = -1,
2227 mcasp->gpio_chip = davinci_mcasp_template_chip; in davinci_mcasp_init_gpiochip()
2228 mcasp->gpio_chip.label = dev_name(mcasp->dev); in davinci_mcasp_init_gpiochip()
2229 mcasp->gpio_chip.parent = mcasp->dev; in davinci_mcasp_init_gpiochip()
2231 return devm_gpiochip_add_data(mcasp->dev, &mcasp->gpio_chip, mcasp); in davinci_mcasp_init_gpiochip()
2250 if (!pdev->dev.platform_data && !pdev->dev.of_node) { in davinci_mcasp_probe()
2251 dev_err(&pdev->dev, "No platform data supplied\n"); in davinci_mcasp_probe()
2252 return -EINVAL; in davinci_mcasp_probe()
2255 mcasp = devm_kzalloc(&pdev->dev, sizeof(struct davinci_mcasp), in davinci_mcasp_probe()
2258 return -ENOMEM; in davinci_mcasp_probe()
2262 dev_warn(&pdev->dev, in davinci_mcasp_probe()
2266 dev_err(&pdev->dev, "no mem resource?\n"); in davinci_mcasp_probe()
2267 return -ENODEV; in davinci_mcasp_probe()
2271 mcasp->base = devm_ioremap_resource(&pdev->dev, mem); in davinci_mcasp_probe()
2272 if (IS_ERR(mcasp->base)) in davinci_mcasp_probe()
2273 return PTR_ERR(mcasp->base); in davinci_mcasp_probe()
2275 dev_set_drvdata(&pdev->dev, mcasp); in davinci_mcasp_probe()
2276 pm_runtime_enable(&pdev->dev); in davinci_mcasp_probe()
2278 mcasp->dev = &pdev->dev; in davinci_mcasp_probe()
2284 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_probe()
2286 pm_runtime_put(mcasp->dev); in davinci_mcasp_probe()
2289 if (mcasp->missing_audio_param) in davinci_mcasp_probe()
2294 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_common", in davinci_mcasp_probe()
2295 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2297 ret = -ENOMEM; in davinci_mcasp_probe()
2300 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2305 dev_err(&pdev->dev, "common IRQ request failed\n"); in davinci_mcasp_probe()
2309 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK] = XUNDRN; in davinci_mcasp_probe()
2310 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE] = ROVRN; in davinci_mcasp_probe()
2315 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_rx", in davinci_mcasp_probe()
2316 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2318 ret = -ENOMEM; in davinci_mcasp_probe()
2321 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2325 dev_err(&pdev->dev, "RX IRQ request failed\n"); in davinci_mcasp_probe()
2329 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE] = ROVRN; in davinci_mcasp_probe()
2332 irq = platform_get_irq_byname_optional(pdev, "tx"); in davinci_mcasp_probe()
2334 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_tx", in davinci_mcasp_probe()
2335 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2337 ret = -ENOMEM; in davinci_mcasp_probe()
2340 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2344 dev_err(&pdev->dev, "TX IRQ request failed\n"); in davinci_mcasp_probe()
2348 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK] = XUNDRN; in davinci_mcasp_probe()
2353 mcasp->dat_port = true; in davinci_mcasp_probe()
2355 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_probe()
2356 dma_data->filter_data = "tx"; in davinci_mcasp_probe()
2358 dma_data->addr = dat->start; in davinci_mcasp_probe()
2363 if (mcasp->version == MCASP_VERSION_OMAP) in davinci_mcasp_probe()
2364 dma_data->addr += davinci_mcasp_txdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2366 dma_data->addr = mem->start + davinci_mcasp_txdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2371 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { in davinci_mcasp_probe()
2372 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_probe()
2373 dma_data->filter_data = "rx"; in davinci_mcasp_probe()
2375 dma_data->addr = dat->start; in davinci_mcasp_probe()
2377 dma_data->addr = in davinci_mcasp_probe()
2378 mem->start + davinci_mcasp_rxdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2381 if (mcasp->version < MCASP_VERSION_3) { in davinci_mcasp_probe()
2382 mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE; in davinci_mcasp_probe()
2383 /* dma_params->dma_addr is pointing to the data port address */ in davinci_mcasp_probe()
2384 mcasp->dat_port = true; in davinci_mcasp_probe()
2386 mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE; in davinci_mcasp_probe()
2390 * scenarios. Maximum number tdm slots is 32 and there cannot in davinci_mcasp_probe()
2396 mcasp->chconstr[SNDRV_PCM_STREAM_PLAYBACK].list = in davinci_mcasp_probe()
2397 devm_kcalloc(mcasp->dev, in davinci_mcasp_probe()
2398 32 + mcasp->num_serializer - 1, in davinci_mcasp_probe()
2402 mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list = in davinci_mcasp_probe()
2403 devm_kcalloc(mcasp->dev, in davinci_mcasp_probe()
2404 32 + mcasp->num_serializer - 1, in davinci_mcasp_probe()
2408 if (!mcasp->chconstr[SNDRV_PCM_STREAM_PLAYBACK].list || in davinci_mcasp_probe()
2409 !mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list) { in davinci_mcasp_probe()
2410 ret = -ENOMEM; in davinci_mcasp_probe()
2420 ret = devm_snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, in davinci_mcasp_probe()
2421 &davinci_mcasp_dai[mcasp->op_mode], 1); in davinci_mcasp_probe()
2429 ret = edma_pcm_platform_register(&pdev->dev); in davinci_mcasp_probe()
2432 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) in davinci_mcasp_probe()
2433 ret = sdma_pcm_platform_register(&pdev->dev, "tx", "rx"); in davinci_mcasp_probe()
2435 ret = sdma_pcm_platform_register(&pdev->dev, "tx", NULL); in davinci_mcasp_probe()
2438 ret = udma_pcm_platform_register(&pdev->dev); in davinci_mcasp_probe()
2441 dev_err(&pdev->dev, "No DMA controller found (%d)\n", ret); in davinci_mcasp_probe()
2443 case -EPROBE_DEFER: in davinci_mcasp_probe()
2448 dev_err(&pdev->dev, "register PCM failed: %d\n", ret); in davinci_mcasp_probe()
2455 dev_err(&pdev->dev, "gpiochip registration failed: %d\n", ret); in davinci_mcasp_probe()
2461 pm_runtime_disable(&pdev->dev); in davinci_mcasp_probe()
2467 pm_runtime_disable(&pdev->dev); in davinci_mcasp_remove()
2474 struct davinci_mcasp_context *context = &mcasp->context; in davinci_mcasp_runtime_suspend()
2479 context->config_regs[i] = mcasp_get_reg(mcasp, context_regs[i]); in davinci_mcasp_runtime_suspend()
2481 if (mcasp->txnumevt) { in davinci_mcasp_runtime_suspend()
2482 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()
2483 context->afifo_regs[0] = mcasp_get_reg(mcasp, reg); in davinci_mcasp_runtime_suspend()
2485 if (mcasp->rxnumevt) { in davinci_mcasp_runtime_suspend()
2486 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()
2487 context->afifo_regs[1] = mcasp_get_reg(mcasp, reg); in davinci_mcasp_runtime_suspend()
2490 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_runtime_suspend()
2491 context->xrsr_regs[i] = mcasp_get_reg(mcasp, in davinci_mcasp_runtime_suspend()
2500 struct davinci_mcasp_context *context = &mcasp->context; in davinci_mcasp_runtime_resume()
2505 mcasp_set_reg(mcasp, context_regs[i], context->config_regs[i]); in davinci_mcasp_runtime_resume()
2507 if (mcasp->txnumevt) { in davinci_mcasp_runtime_resume()
2508 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_resume()
2509 mcasp_set_reg(mcasp, reg, context->afifo_regs[0]); in davinci_mcasp_runtime_resume()
2511 if (mcasp->rxnumevt) { in davinci_mcasp_runtime_resume()
2512 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_runtime_resume()
2513 mcasp_set_reg(mcasp, reg, context->afifo_regs[1]); in davinci_mcasp_runtime_resume()
2516 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_runtime_resume()
2518 context->xrsr_regs[i]); in davinci_mcasp_runtime_resume()
2535 .name = "davinci-mcasp",