Lines Matching +full:ipc +full:- +full:3
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
15 #include "../ipc4-priv.h"
18 #include "hda-ipc.h"
19 #include "../sof-audio.h"
47 * set DONE bit - tell DSP we have received the reply msg from DSP, and processed it, in mtl_ipc_dsp_done()
58 /* Check if an IPC IRQ occurred */
64 if (sdev->dspless_mode_selected) in mtl_dsp_check_ipc_irq()
97 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_ipc_send_msg()
98 struct sof_ipc4_msg *msg_data = msg->msg_data; in mtl_ipc_send_msg()
101 hdev->delayed_ipc_tx_msg = msg; in mtl_ipc_send_msg()
105 hdev->delayed_ipc_tx_msg = NULL; in mtl_ipc_send_msg()
108 if (msg_data->data_size) in mtl_ipc_send_msg()
109 sof_mailbox_write(sdev, sdev->host_box.offset, msg_data->data_ptr, in mtl_ipc_send_msg()
110 msg_data->data_size); in mtl_ipc_send_msg()
113 msg_data->extension); in mtl_ipc_send_msg()
115 msg_data->primary | MTL_DSP_REG_HFIPCXIDR_BUSY); in mtl_ipc_send_msg()
124 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in mtl_enable_ipc_interrupts()
125 const struct sof_intel_dsp_desc *chip = hda->desc; in mtl_enable_ipc_interrupts()
127 if (sdev->dspless_mode_selected) in mtl_enable_ipc_interrupts()
130 /* enable IPC DONE and BUSY interrupts */ in mtl_enable_ipc_interrupts()
131 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in mtl_enable_ipc_interrupts()
138 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in mtl_disable_ipc_interrupts()
139 const struct sof_intel_dsp_desc *chip = hda->desc; in mtl_disable_ipc_interrupts()
141 if (sdev->dspless_mode_selected) in mtl_disable_ipc_interrupts()
144 /* disable IPC DONE and BUSY interrupts */ in mtl_disable_ipc_interrupts()
145 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in mtl_disable_ipc_interrupts()
156 if (sdev->dspless_mode_selected) in mtl_enable_sdw_irq()
173 dev_err(sdev->dev, "failed to set SoundWire IPC interrupt %s\n", in mtl_enable_sdw_irq()
186 if (sdev->dspless_mode_selected) in mtl_enable_interrupts()
192 /* Enable/Disable Host IPC and SOUNDWIRE */ in mtl_enable_interrupts()
206 dev_err(sdev->dev, "failed to %s Host IPC and/or SOUNDWIRE\n", in mtl_enable_interrupts()
211 /* Enable/Disable Host IPC interrupt*/ in mtl_enable_interrupts()
225 dev_err(sdev->dev, "failed to set Host IPC interrupt %s\n", in mtl_enable_interrupts()
236 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_dsp_pre_fw_run()
256 dev_err(sdev->dev, "failed to enable DSP subsystem\n"); in mtl_dsp_pre_fw_run()
260 /* Power up gated-DSP-0 domain in order to access the DSP shim register block. */ in mtl_dsp_pre_fw_run()
273 dev_err(sdev->dev, "failed to power up gated DSP domain\n"); in mtl_dsp_pre_fw_run()
275 /* if SoundWire is used, make sure it is not power-gated */ in mtl_dsp_pre_fw_run()
276 if (hdev->info.handle && hdev->info.link_mask > 0) in mtl_dsp_pre_fw_run()
287 if (sdev->first_boot) { in mtl_dsp_post_fw_run()
288 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_dsp_post_fw_run()
292 dev_err(sdev->dev, "could not startup SoundWire links\n"); in mtl_dsp_post_fw_run()
298 hdev->imrboot_supported = true; in mtl_dsp_post_fw_run()
318 dev_err(sdev->dev, "ROM status: %#x, ROM error: %#x\n", fwsts, fwlec); in mtl_dsp_dump()
319 dev_err(sdev->dev, "ROM debug status: %#x, ROM debug error: %#x\n", romdbgsts, in mtl_dsp_dump()
321 romdbgsts = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFFLGPXQWY + 0x8 * 3); in mtl_dsp_dump()
322 dev_printk(level, sdev->dev, "ROM feature bit%s enabled\n", in mtl_dsp_dump()
368 dev_err(sdev->dev, "%s: timeout on MTL_DSP2CXCTL_PRIMARY_CORE read\n", in mtl_dsp_core_power_up()
374 sdev->enabled_cores_mask = BIT(SOF_DSP_PRIMARY_CORE); in mtl_dsp_core_power_up()
375 sdev->dsp_core_ref_count[SOF_DSP_PRIMARY_CORE] = 1; in mtl_dsp_core_power_up()
401 dev_err(sdev->dev, "failed to power down primary core\n"); in mtl_dsp_core_power_down()
405 sdev->enabled_cores_mask = 0; in mtl_dsp_core_power_down()
406 sdev->dsp_core_ref_count[SOF_DSP_PRIMARY_CORE] = 0; in mtl_dsp_core_power_down()
419 dev_err(sdev->dev, "mtl dsp power down error, %d\n", ret); in mtl_power_down_dsp()
440 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in mtl_dsp_cl_init()
441 const struct sof_intel_dsp_desc *chip = hda->desc; in mtl_dsp_cl_init()
448 ipc_hdr = chip->ipc_req_mask | HDA_DSP_ROM_IPC_CONTROL; in mtl_dsp_cl_init()
450 ipc_hdr |= HDA_DSP_ROM_IPC_PURGE_FW | ((stream_tag - 1) << 9); in mtl_dsp_cl_init()
452 snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, ipc_hdr); in mtl_dsp_cl_init()
457 if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS) in mtl_dsp_cl_init()
458 dev_err(sdev->dev, "dsp core 0/1 power up failed\n"); in mtl_dsp_cl_init()
462 dev_dbg(sdev->dev, "Primary core power up successful\n"); in mtl_dsp_cl_init()
464 /* step 3: wait for IPC DONE bit from ROM */ in mtl_dsp_cl_init()
465 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, chip->ipc_ack, status, in mtl_dsp_cl_init()
466 ((status & chip->ipc_ack_mask) == chip->ipc_ack_mask), in mtl_dsp_cl_init()
469 if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS) in mtl_dsp_cl_init()
470 dev_err(sdev->dev, "timeout waiting for purge IPC done\n"); in mtl_dsp_cl_init()
474 /* set DONE bit to clear the reply IPC message */ in mtl_dsp_cl_init()
475 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, chip->ipc_ack, chip->ipc_ack_mask, in mtl_dsp_cl_init()
476 chip->ipc_ack_mask); in mtl_dsp_cl_init()
481 if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS) in mtl_dsp_cl_init()
482 dev_err(sdev->dev, "%s: failed to enable interrupts\n", __func__); in mtl_dsp_cl_init()
500 if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS) in mtl_dsp_cl_init()
504 hda->boot_iteration, HDA_FW_BOOT_ATTEMPTS); in mtl_dsp_cl_init()
542 * ACE fw sends a new fw ipc message to host to in mtl_ipc_irq_thread()
543 * notify the status of the last host ipc message in mtl_ipc_irq_thread()
547 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in mtl_ipc_irq_thread()
548 struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data; in mtl_ipc_irq_thread()
550 data->primary = primary; in mtl_ipc_irq_thread()
551 data->extension = extension; in mtl_ipc_irq_thread()
553 spin_lock_irq(&sdev->ipc_lock); in mtl_ipc_irq_thread()
557 snd_sof_ipc_reply(sdev, data->primary); in mtl_ipc_irq_thread()
559 spin_unlock_irq(&sdev->ipc_lock); in mtl_ipc_irq_thread()
561 dev_dbg_ratelimited(sdev->dev, in mtl_ipc_irq_thread()
562 "IPC reply before FW_READY: %#x|%#x\n", in mtl_ipc_irq_thread()
570 sdev->ipc->msg.rx_data = ¬ification_data; in mtl_ipc_irq_thread()
572 sdev->ipc->msg.rx_data = NULL; in mtl_ipc_irq_thread()
582 dev_dbg_ratelimited(sdev->dev, "nothing to do in IPC IRQ thread\n"); in mtl_ipc_irq_thread()
586 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in mtl_ipc_irq_thread()
588 if (hdev->delayed_ipc_tx_msg) in mtl_ipc_irq_thread()
589 mtl_ipc_send_msg(sdev, hdev->delayed_ipc_tx_msg); in mtl_ipc_irq_thread()
617 dev_err(sdev->dev, in mtl_ipc_dump()
618 "Host IPC initiator: %#x|%#x|%#x, target: %#x|%#x|%#x, ctl: %#x\n", in mtl_ipc_dump()
633 struct hdac_stream *hstream = substream->runtime->private_data; in mtl_dsp_get_stream_hda_link_position()
636 llp_l = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPL(hstream->index)); in mtl_dsp_get_stream_hda_link_position()
637 llp_u = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPU(hstream->index)); in mtl_dsp_get_stream_hda_link_position()
643 const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; in mtl_dsp_core_get()
648 if (pm_ops->set_core_state) in mtl_dsp_core_get()
649 return pm_ops->set_core_state(sdev, core, true); in mtl_dsp_core_get()
656 const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; in mtl_dsp_core_put()
659 if (pm_ops->set_core_state) { in mtl_dsp_core_put()
660 ret = pm_ops->set_core_state(sdev, core, false); in mtl_dsp_core_put()
688 /* ipc */ in sof_mtl_ops_init()
712 sdev->private = kzalloc(sizeof(struct sof_ipc4_fw_data), GFP_KERNEL); in sof_mtl_ops_init()
713 if (!sdev->private) in sof_mtl_ops_init()
714 return -ENOMEM; in sof_mtl_ops_init()
716 ipc4_data = sdev->private; in sof_mtl_ops_init()
717 ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET; in sof_mtl_ops_init()
719 ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_2; in sof_mtl_ops_init()
721 ipc4_data->fw_context_save = true; in sof_mtl_ops_init()
724 ipc4_data->load_library = hda_dsp_ipc4_load_library; in sof_mtl_ops_init()
736 .cores_num = 3,