1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
15  * Hardware interface for audio DSP on Cannonlake.
21 #include "../ipc4-priv.h"
24 #include "hda-ipc.h"
25 #include "../sof-audio.h"
30 	{"dsp", HDA_DSP_BAR,  0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
47 		/* DSP received the message */  in cnl_ipc4_irq_thread()
58 		/* Message from DSP (reply or notification) */  in cnl_ipc4_irq_thread()
66 			if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) {  in cnl_ipc4_irq_thread()
67 				struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data;  in cnl_ipc4_irq_thread()
69 				data->primary = primary;  in cnl_ipc4_irq_thread()
70 				data->extension = extension;  in cnl_ipc4_irq_thread()
72 				spin_lock_irq(&sdev->ipc_lock);  in cnl_ipc4_irq_thread()
76 				snd_sof_ipc_reply(sdev, data->primary);  in cnl_ipc4_irq_thread()
78 				spin_unlock_irq(&sdev->ipc_lock);  in cnl_ipc4_irq_thread()
80 				dev_dbg_ratelimited(sdev->dev,  in cnl_ipc4_irq_thread()
89 			sdev->ipc->msg.rx_data = &notification_data;  in cnl_ipc4_irq_thread()
91 			sdev->ipc->msg.rx_data = NULL;  in cnl_ipc4_irq_thread()
93 			/* Let DSP know that we have finished processing the message */  in cnl_ipc4_irq_thread()
102 		dev_dbg_ratelimited(sdev->dev, "nothing to do in IPC IRQ thread\n");  in cnl_ipc4_irq_thread()
105 		struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;  in cnl_ipc4_irq_thread()
107 		if (hdev->delayed_ipc_tx_msg)  in cnl_ipc4_irq_thread()
108 			cnl_ipc4_send_msg(sdev, hdev->delayed_ipc_tx_msg);  in cnl_ipc4_irq_thread()
130 	/* reply message from DSP */  in cnl_ipc_irq_thread()
142 		if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) {  in cnl_ipc_irq_thread()
143 			spin_lock_irq(&sdev->ipc_lock);  in cnl_ipc_irq_thread()
145 			/* handle immediate reply from DSP core */  in cnl_ipc_irq_thread()
151 			spin_unlock_irq(&sdev->ipc_lock);  in cnl_ipc_irq_thread()
153 			dev_dbg_ratelimited(sdev->dev, "IPC reply before FW_READY: %#x\n",  in cnl_ipc_irq_thread()
160 	/* new message from DSP */  in cnl_ipc_irq_thread()
167 		/* handle messages from DSP */  in cnl_ipc_irq_thread()
169 			struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;  in cnl_ipc_irq_thread()
177 			 * to false as the DSP might be able to boot in the next  in cnl_ipc_irq_thread()
180 			if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS &&  in cnl_ipc_irq_thread()
181 			    hda->boot_iteration < HDA_FW_BOOT_ATTEMPTS)  in cnl_ipc_irq_thread()
199 		dev_dbg_ratelimited(sdev->dev,  in cnl_ipc_irq_thread()
209 	 * clear busy interrupt to tell dsp controller this  in cnl_ipc_host_done()
217 	 * set done bit to ack dsp the msg has been  in cnl_ipc_host_done()
218 	 * processed and send reply msg to dsp  in cnl_ipc_host_done()
229 	 * set DONE bit - tell DSP we have received the reply msg  in cnl_ipc_dsp_done()
230 	 * from DSP, and processed it, don't send more reply to host  in cnl_ipc_dsp_done()
247 	struct sof_ipc_pm_gate *pm_gate = msg->msg_data;  in cnl_compact_ipc_compress()
249 	if (pm_gate->hdr.cmd == (SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_GATE)) {  in cnl_compact_ipc_compress()
254 		*dd = pm_gate->flags;  in cnl_compact_ipc_compress()
264 	struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;  in cnl_ipc4_send_msg()
265 	struct sof_ipc4_msg *msg_data = msg->msg_data;  in cnl_ipc4_send_msg()
268 		hdev->delayed_ipc_tx_msg = msg;  in cnl_ipc4_send_msg()
272 	hdev->delayed_ipc_tx_msg = NULL;  in cnl_ipc4_send_msg()
275 	if (msg_data->data_size)  in cnl_ipc4_send_msg()
276 		sof_mailbox_write(sdev, sdev->host_box.offset, msg_data->data_ptr,  in cnl_ipc4_send_msg()
277 				  msg_data->data_size);  in cnl_ipc4_send_msg()
279 	snd_sof_dsp_write(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDD, msg_data->extension);  in cnl_ipc4_send_msg()
281 			  msg_data->primary | CNL_DSP_REG_HIPCIDR_BUSY);  in cnl_ipc4_send_msg()
290 	struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;  in cnl_ipc_send_msg()
297 	 * IPC which is used for transitioning the DSP between the  in cnl_ipc_send_msg()
300 	 * that a compact IPC results in the DSP exiting D0I3 without  in cnl_ipc_send_msg()
313 	sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,  in cnl_ipc_send_msg()
314 			  msg->msg_size);  in cnl_ipc_send_msg()
318 	hdr = msg->msg_data;  in cnl_ipc_send_msg()
323 	 * IPCs are sent at a high-rate. mod_delayed_work()  in cnl_ipc_send_msg()
324 	 * modifies the timer if the work is pending.  in cnl_ipc_send_msg()
326 	 * CTX_SAVE IPC, which is sent before the DSP enters D3.  in cnl_ipc_send_msg()
328 	if (hdr->cmd != (SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CTX_SAVE))  in cnl_ipc_send_msg()
329 		mod_delayed_work(system_wq, &hdev->d0i3_work,  in cnl_ipc_send_msg()
350 	dev_err(sdev->dev,  in cnl_ipc_dump()
351 		"error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",  in cnl_ipc_dump()
371 	dev_err(sdev->dev,  in cnl_ipc4_dump()
389 	if (sdev->pdata->ipc_type == SOF_IPC_TYPE_3) {  in sof_cnl_ops_init()
402 	if (sdev->pdata->ipc_type == SOF_IPC_TYPE_4) {  in sof_cnl_ops_init()
405 		sdev->private = kzalloc(sizeof(*ipc4_data), GFP_KERNEL);  in sof_cnl_ops_init()
406 		if (!sdev->private)  in sof_cnl_ops_init()
407 			return -ENOMEM;  in sof_cnl_ops_init()
409 		ipc4_data = sdev->private;  in sof_cnl_ops_init()
410 		ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET;  in sof_cnl_ops_init()
412 		ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_1_8;  in sof_cnl_ops_init()
415 		ipc4_data->load_library = hda_dsp_ipc4_load_library;  in sof_cnl_ops_init()
442 	/* dsp core get/put */  in sof_cnl_ops_init()
481  * two cores, it cannot support the IceLake-specific power-up sequences