Lines Matching +full:mclk +full:- +full:fs
1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
34 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in loongson_i2s_trigger()
35 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
39 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
46 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in loongson_i2s_trigger()
47 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
50 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
54 ret = -EINVAL; in loongson_i2s_trigger()
65 u32 clk_rate = i2s->clk_rate; in loongson_i2s_hw_params()
66 u32 sysclk = i2s->sysclk; in loongson_i2s_hw_params()
69 u32 fs = params_rate(params); in loongson_i2s_hw_params() local
74 switch (i2s->rev_id) { in loongson_i2s_hw_params()
77 (bits * chans * fs * 2)) - 1; in loongson_i2s_hw_params()
78 mclk_ratio = DIV_ROUND_CLOSEST(clk_rate, (sysclk * 2)) - 1; in loongson_i2s_hw_params()
85 regmap_write(i2s->regmap, LS_I2S_CFG, val); in loongson_i2s_hw_params()
90 (bits * chans * fs * 2)) - 1; in loongson_i2s_hw_params()
93 sysclk) - (mclk_ratio << 16); in loongson_i2s_hw_params()
95 regmap_read(i2s->regmap, LS_I2S_CFG, &val); in loongson_i2s_hw_params()
98 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in loongson_i2s_hw_params()
102 regmap_write(i2s->regmap, LS_I2S_CFG, val); in loongson_i2s_hw_params()
105 regmap_write(i2s->regmap, LS_I2S_CFG1, val); in loongson_i2s_hw_params()
109 dev_err(i2s->dev, "I2S revision invalid\n"); in loongson_i2s_hw_params()
110 return -EINVAL; in loongson_i2s_hw_params()
121 i2s->sysclk = freq; in loongson_i2s_set_dai_sysclk()
136 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, I2S_CTRL_MSB, in loongson_i2s_set_fmt()
140 return -EINVAL; in loongson_i2s_set_fmt()
149 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, I2S_CTRL_MASTER, in loongson_i2s_set_fmt()
151 if (i2s->rev_id == 1) { in loongson_i2s_set_fmt()
152 ret = regmap_read_poll_timeout_atomic(i2s->regmap, in loongson_i2s_set_fmt()
157 dev_warn(dai->dev, "wait BCLK ready timeout\n"); in loongson_i2s_set_fmt()
161 /* Enable MCLK */ in loongson_i2s_set_fmt()
162 if (i2s->rev_id == 1) { in loongson_i2s_set_fmt()
163 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_set_fmt()
166 ret = regmap_read_poll_timeout_atomic(i2s->regmap, in loongson_i2s_set_fmt()
171 dev_warn(dai->dev, "wait MCLK ready timeout\n"); in loongson_i2s_set_fmt()
175 /* Enable MCLK */ in loongson_i2s_set_fmt()
176 if (i2s->rev_id == 1) { in loongson_i2s_set_fmt()
177 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_set_fmt()
180 ret = regmap_read_poll_timeout_atomic(i2s->regmap, in loongson_i2s_set_fmt()
185 dev_warn(dai->dev, "wait MCLK ready timeout\n"); in loongson_i2s_set_fmt()
189 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, I2S_CTRL_MASTER, in loongson_i2s_set_fmt()
191 if (i2s->rev_id == 1) { in loongson_i2s_set_fmt()
192 ret = regmap_read_poll_timeout_atomic(i2s->regmap, in loongson_i2s_set_fmt()
197 dev_warn(dai->dev, "wait BCLK ready timeout\n"); in loongson_i2s_set_fmt()
201 return -EINVAL; in loongson_i2s_set_fmt()
209 struct loongson_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in loongson_i2s_dai_probe()
211 snd_soc_dai_init_dma_data(cpu_dai, &i2s->playback_dma_data, in loongson_i2s_dai_probe()
212 &i2s->capture_dma_data); in loongson_i2s_dai_probe()
227 .name = "loongson-i2s",
229 .stream_name = "CPU-Playback",
236 .stream_name = "CPU-Capture",
250 regcache_cache_only(i2s->regmap, true); in i2s_suspend()
260 regcache_cache_only(i2s->regmap, false); in i2s_resume()
261 regcache_mark_dirty(i2s->regmap); in i2s_resume()
262 ret = regcache_sync(i2s->regmap); in i2s_resume()