Lines Matching +full:envelope +full:- +full:detector
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
19 #include <linux/dma/imx-dma.h>
100 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
101 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
102 { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
126 switch (micfil->quality) { in micfil_set_quality()
147 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in micfil_set_quality()
158 ucontrol->value.integer.value[0] = micfil->quality; in micfil_quality_get()
169 micfil->quality = ucontrol->value.integer.value[0]; in micfil_quality_set()
180 "Envelope mode", "Energy mode",
185 "Cut-off @1750Hz",
186 "Cut-off @215Hz",
187 "Cut-off @102Hz",
193 * Cut-off @21Hz 0 0
194 * Cut-off @83Hz 0 1
195 * Cut-off @152HZ 1 0
198 "Cut-off @21Hz", "Cut-off @83Hz",
199 "Cut-off @152Hz", "Bypass",
219 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in micfil_put_dc_remover_state()
222 unsigned int *item = ucontrol->value.enumerated.item; in micfil_put_dc_remover_state()
228 return -EINVAL; in micfil_put_dc_remover_state()
230 micfil->dc_remover = val; in micfil_put_dc_remover_state()
251 ucontrol->value.enumerated.item[0] = micfil->dc_remover; in micfil_get_dc_remover_state()
260 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_enable()
261 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_enable()
265 micfil->vad_enabled = val; in hwvad_put_enable()
276 ucontrol->value.enumerated.item[0] = micfil->vad_enabled; in hwvad_get_enable()
285 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_init_mode()
286 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_init_mode()
290 /* 0 - Envelope-based Mode in hwvad_put_init_mode()
291 * 1 - Energy-based Mode in hwvad_put_init_mode()
293 micfil->vad_init_mode = val; in hwvad_put_init_mode()
304 ucontrol->value.enumerated.item[0] = micfil->vad_init_mode; in hwvad_get_init_mode()
315 ucontrol->value.enumerated.item[0] = micfil->vad_detected; in hwvad_detected()
344 SOC_ENUM("HWVAD High-Pass Filter", hwvad_hpf_enum),
353 SOC_SINGLE_RANGE("HWVAD Detector Frame Time", REG_MICFIL_VAD0_CTRL2, 16, 0, 63, 0),
354 SOC_SINGLE("HWVAD Detector Initialization Time", REG_MICFIL_VAD0_CTRL1, 8, 31, 0),
369 if (!micfil->soc->use_verid) in fsl_micfil_use_verid()
372 ret = regmap_read(micfil->regmap, REG_MICFIL_VERID, &val); in fsl_micfil_use_verid()
378 micfil->verid.version = val & in fsl_micfil_use_verid()
380 micfil->verid.version >>= MICFIL_VERID_MINOR_SHIFT; in fsl_micfil_use_verid()
381 micfil->verid.feature = val & MICFIL_VERID_FEATURE_MASK; in fsl_micfil_use_verid()
383 ret = regmap_read(micfil->regmap, REG_MICFIL_PARAM, &val); in fsl_micfil_use_verid()
389 micfil->param.hwvad_num = (val & MICFIL_PARAM_NUM_HWVAD_MASK) >> in fsl_micfil_use_verid()
391 micfil->param.hwvad_zcd = val & MICFIL_PARAM_HWVAD_ZCD; in fsl_micfil_use_verid()
392 micfil->param.hwvad_energy_mode = val & MICFIL_PARAM_HWVAD_ENERGY_MODE; in fsl_micfil_use_verid()
393 micfil->param.hwvad = val & MICFIL_PARAM_HWVAD; in fsl_micfil_use_verid()
394 micfil->param.dc_out_bypass = val & MICFIL_PARAM_DC_OUT_BYPASS; in fsl_micfil_use_verid()
395 micfil->param.dc_in_bypass = val & MICFIL_PARAM_DC_IN_BYPASS; in fsl_micfil_use_verid()
396 micfil->param.low_power = val & MICFIL_PARAM_LOW_POWER; in fsl_micfil_use_verid()
397 micfil->param.fil_out_width = val & MICFIL_PARAM_FIL_OUT_WIDTH; in fsl_micfil_use_verid()
398 micfil->param.fifo_ptrwid = (val & MICFIL_PARAM_FIFO_PTRWID_MASK) >> in fsl_micfil_use_verid()
400 micfil->param.npair = (val & MICFIL_PARAM_NPAIR_MASK) >> in fsl_micfil_use_verid()
406 /* The SRES is a self-negated bit which provides the CPU with the
408 * slave-bus interface. This bit always reads as zero, and this
416 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
421 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
427 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined in fsl_micfil_reset()
428 * as non-volatile register, so SRES still remain in regmap in fsl_micfil_reset()
432 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
441 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); in fsl_micfil_reset()
454 dev_err(dai->dev, "micfil dai priv_data not set\n"); in fsl_micfil_startup()
455 return -EINVAL; in fsl_micfil_startup()
467 /* Voice Activity Detector Error Interruption */ in fsl_micfil_configure_hwvad_interrupts()
468 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
471 /* Voice Activity Detector Interruption */ in fsl_micfil_configure_hwvad_interrupts()
472 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
478 /* Configuration done only in energy-based initialization mode */
482 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
486 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
490 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
494 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
498 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
502 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
506 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
510 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
516 /* Configuration done only in envelope-based initialization mode */
520 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
524 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
528 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
532 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
536 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
540 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
544 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
548 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
560 * -> Eneveope-based mode (section 8.4.1)
561 * -> Energy-based mode (section 8.4.2)
563 * It is important to remark that the HWVAD detector could be enabled
571 micfil->vad_detected = 0; in fsl_micfil_hwvad_enable()
573 /* envelope-based specific initialization */ in fsl_micfil_hwvad_enable()
574 if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE) in fsl_micfil_hwvad_enable()
581 /* Voice Activity Detector Internal Filters Initialization*/ in fsl_micfil_hwvad_enable()
582 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
585 /* Voice Activity Detector Internal Filter */ in fsl_micfil_hwvad_enable()
586 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
594 /* Voice Activity Detector Reset */ in fsl_micfil_hwvad_enable()
595 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
598 /* Voice Activity Detector Enabled */ in fsl_micfil_hwvad_enable()
599 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
607 struct device *dev = &micfil->pdev->dev; in fsl_micfil_hwvad_disable()
611 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_disable()
626 struct device *dev = &micfil->pdev->dev; in fsl_micfil_trigger()
639 /* DMA Interrupt Selection - DISEL bits in fsl_micfil_trigger()
640 * 00 - DMA and IRQ disabled in fsl_micfil_trigger()
641 * 01 - DMA req enabled in fsl_micfil_trigger()
642 * 10 - IRQ enabled in fsl_micfil_trigger()
643 * 11 - reserved in fsl_micfil_trigger()
645 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
652 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
657 if (micfil->vad_enabled) in fsl_micfil_trigger()
664 if (micfil->vad_enabled) in fsl_micfil_trigger()
668 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
673 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
680 return -EINVAL; in fsl_micfil_trigger()
687 struct device *dev = &micfil->pdev->dev; in fsl_micfil_reparent_rootclk()
693 clk = micfil->mclk; in fsl_micfil_reparent_rootclk()
697 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, in fsl_micfil_reparent_rootclk()
698 micfil->pll11k_clk, ratio); in fsl_micfil_reparent_rootclk()
718 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
724 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
725 0xFF, ((1 << channels) - 1)); in fsl_micfil_hw_params()
733 ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8); in fsl_micfil_hw_params()
741 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
744 FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
747 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
749 FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
752 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
754 FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1))); in fsl_micfil_hw_params()
756 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; in fsl_micfil_hw_params()
757 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); in fsl_micfil_hw_params()
758 micfil->sdmacfg.n_fifos_src = channels; in fsl_micfil_hw_params()
759 micfil->sdmacfg.sw_done = true; in fsl_micfil_hw_params()
760 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX; in fsl_micfil_hw_params()
761 if (micfil->soc->use_edma) in fsl_micfil_hw_params()
762 micfil->dma_params_rx.maxburst = channels; in fsl_micfil_hw_params()
769 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); in fsl_micfil_dai_probe()
770 struct device *dev = cpu_dai->dev; in fsl_micfil_dai_probe()
774 micfil->quality = QUALITY_VLOW0; in fsl_micfil_dai_probe()
775 micfil->card = cpu_dai->component->card; in fsl_micfil_dai_probe()
778 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); in fsl_micfil_dai_probe()
783 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, in fsl_micfil_dai_probe()
789 micfil->dc_remover = MICFIL_DC_BYPASS; in fsl_micfil_dai_probe()
792 &micfil->dma_params_rx); in fsl_micfil_dai_probe()
794 /* FIFO Watermark Control - FIFOWMK*/ in fsl_micfil_dai_probe()
795 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL, in fsl_micfil_dai_probe()
797 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1)); in fsl_micfil_dai_probe()
813 .stream_name = "CPU-Capture",
823 .name = "fsl-micfil-dai",
956 struct platform_device *pdev = micfil->pdev; in micfil_isr()
963 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_isr()
964 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg); in micfil_isr()
965 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_isr()
969 /* Channel 0-7 Output Data Flags */ in micfil_isr()
972 dev_dbg(&pdev->dev, in micfil_isr()
978 regmap_write_bits(micfil->regmap, in micfil_isr()
986 dev_dbg(&pdev->dev, in micfil_isr()
991 dev_dbg(&pdev->dev, in micfil_isr()
1002 struct platform_device *pdev = micfil->pdev; in micfil_err_isr()
1005 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_err_isr()
1008 dev_dbg(&pdev->dev, "isr: Decimation Filter is running\n"); in micfil_err_isr()
1011 dev_dbg(&pdev->dev, "isr: FIR Filter Data ready\n"); in micfil_err_isr()
1014 dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); in micfil_err_isr()
1015 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, in micfil_err_isr()
1027 if (!micfil->card) in voice_detected_fn()
1030 kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected"); in voice_detected_fn()
1034 if (micfil->vad_detected) in voice_detected_fn()
1035 snd_ctl_notify(micfil->card->snd_card, in voice_detected_fn()
1037 &kctl->id); in voice_detected_fn()
1045 struct device *dev = &micfil->pdev->dev; in hwvad_isr()
1049 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_isr()
1059 regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT, in hwvad_isr()
1063 micfil->vad_detected = 1; in hwvad_isr()
1076 struct device *dev = &micfil->pdev->dev; in hwvad_err_isr()
1079 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_err_isr()
1092 struct device_node *np = pdev->dev.of_node; in fsl_micfil_probe()
1098 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL); in fsl_micfil_probe()
1100 return -ENOMEM; in fsl_micfil_probe()
1102 micfil->pdev = pdev; in fsl_micfil_probe()
1103 strscpy(micfil->name, np->name, sizeof(micfil->name)); in fsl_micfil_probe()
1105 micfil->soc = of_device_get_match_data(&pdev->dev); in fsl_micfil_probe()
1110 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app"); in fsl_micfil_probe()
1111 if (IS_ERR(micfil->mclk)) { in fsl_micfil_probe()
1112 dev_err(&pdev->dev, "failed to get core clock: %ld\n", in fsl_micfil_probe()
1113 PTR_ERR(micfil->mclk)); in fsl_micfil_probe()
1114 return PTR_ERR(micfil->mclk); in fsl_micfil_probe()
1117 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
1118 if (IS_ERR(micfil->busclk)) { in fsl_micfil_probe()
1119 dev_err(&pdev->dev, "failed to get ipg clock: %ld\n", in fsl_micfil_probe()
1120 PTR_ERR(micfil->busclk)); in fsl_micfil_probe()
1121 return PTR_ERR(micfil->busclk); in fsl_micfil_probe()
1124 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, in fsl_micfil_probe()
1125 &micfil->pll11k_clk); in fsl_micfil_probe()
1132 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1135 if (IS_ERR(micfil->regmap)) { in fsl_micfil_probe()
1136 dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n", in fsl_micfil_probe()
1137 PTR_ERR(micfil->regmap)); in fsl_micfil_probe()
1138 return PTR_ERR(micfil->regmap); in fsl_micfil_probe()
1145 &micfil->dataline); in fsl_micfil_probe()
1147 micfil->dataline = 1; in fsl_micfil_probe()
1149 if (micfil->dataline & ~micfil->soc->dataline) { in fsl_micfil_probe()
1150 dev_err(&pdev->dev, "dataline setting error, Mask is 0x%X\n", in fsl_micfil_probe()
1151 micfil->soc->dataline); in fsl_micfil_probe()
1152 return -EINVAL; in fsl_micfil_probe()
1157 micfil->irq[i] = platform_get_irq(pdev, i); in fsl_micfil_probe()
1158 if (micfil->irq[i] < 0) in fsl_micfil_probe()
1159 return micfil->irq[i]; in fsl_micfil_probe()
1163 ret = devm_request_irq(&pdev->dev, micfil->irq[0], in fsl_micfil_probe()
1165 micfil->name, micfil); in fsl_micfil_probe()
1167 dev_err(&pdev->dev, "failed to claim mic interface irq %u\n", in fsl_micfil_probe()
1168 micfil->irq[0]); in fsl_micfil_probe()
1173 ret = devm_request_irq(&pdev->dev, micfil->irq[1], in fsl_micfil_probe()
1175 micfil->name, micfil); in fsl_micfil_probe()
1177 dev_err(&pdev->dev, "failed to claim mic interface error irq %u\n", in fsl_micfil_probe()
1178 micfil->irq[1]); in fsl_micfil_probe()
1182 /* Digital Microphone interface voice activity detector event */ in fsl_micfil_probe()
1183 ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2], in fsl_micfil_probe()
1185 IRQF_SHARED, micfil->name, micfil); in fsl_micfil_probe()
1187 dev_err(&pdev->dev, "failed to claim hwvad event irq %u\n", in fsl_micfil_probe()
1188 micfil->irq[0]); in fsl_micfil_probe()
1192 /* Digital Microphone interface voice activity detector error */ in fsl_micfil_probe()
1193 ret = devm_request_irq(&pdev->dev, micfil->irq[3], in fsl_micfil_probe()
1195 micfil->name, micfil); in fsl_micfil_probe()
1197 dev_err(&pdev->dev, "failed to claim hwvad error irq %u\n", in fsl_micfil_probe()
1198 micfil->irq[1]); in fsl_micfil_probe()
1202 micfil->dma_params_rx.chan_name = "rx"; in fsl_micfil_probe()
1203 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0; in fsl_micfil_probe()
1204 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; in fsl_micfil_probe()
1208 pm_runtime_enable(&pdev->dev); in fsl_micfil_probe()
1209 if (!pm_runtime_enabled(&pdev->dev)) { in fsl_micfil_probe()
1210 ret = fsl_micfil_runtime_resume(&pdev->dev); in fsl_micfil_probe()
1215 ret = pm_runtime_resume_and_get(&pdev->dev); in fsl_micfil_probe()
1220 ret = fsl_micfil_use_verid(&pdev->dev); in fsl_micfil_probe()
1222 dev_warn(&pdev->dev, "Error reading MICFIL version: %d\n", ret); in fsl_micfil_probe()
1224 ret = pm_runtime_put_sync(&pdev->dev); in fsl_micfil_probe()
1225 if (ret < 0 && ret != -ENOSYS) in fsl_micfil_probe()
1228 regcache_cache_only(micfil->regmap, true); in fsl_micfil_probe()
1234 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in fsl_micfil_probe()
1236 dev_err(&pdev->dev, "failed to pcm register\n"); in fsl_micfil_probe()
1240 fsl_micfil_dai.capture.formats = micfil->soc->formats; in fsl_micfil_probe()
1242 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_micfil_component, in fsl_micfil_probe()
1245 dev_err(&pdev->dev, "failed to register component %s\n", in fsl_micfil_probe()
1253 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_micfil_probe()
1254 fsl_micfil_runtime_suspend(&pdev->dev); in fsl_micfil_probe()
1256 pm_runtime_disable(&pdev->dev); in fsl_micfil_probe()
1263 pm_runtime_disable(&pdev->dev); in fsl_micfil_remove()
1270 regcache_cache_only(micfil->regmap, true); in fsl_micfil_runtime_suspend()
1272 clk_disable_unprepare(micfil->mclk); in fsl_micfil_runtime_suspend()
1273 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_suspend()
1283 ret = clk_prepare_enable(micfil->busclk); in fsl_micfil_runtime_resume()
1287 ret = clk_prepare_enable(micfil->mclk); in fsl_micfil_runtime_resume()
1289 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_resume()
1293 regcache_cache_only(micfil->regmap, false); in fsl_micfil_runtime_resume()
1294 regcache_mark_dirty(micfil->regmap); in fsl_micfil_runtime_resume()
1295 regcache_sync(micfil->regmap); in fsl_micfil_runtime_resume()
1312 .name = "fsl-micfil-dai",
1319 MODULE_AUTHOR("Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>");