Lines Matching full:wsa
19 #include "lpass-wsa-macro.h"
465 SOC_DAPM_ENUM("WSA RX_MIX EC0_Mux", rx_mix_ec0_enum);
468 SOC_DAPM_ENUM("WSA RX_MIX EC1_Mux", rx_mix_ec1_enum);
471 /* WSA Macro */
819 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_spkr_mode() local
821 wsa->spkr_mode = mode; in wsa_macro_set_spkr_mode()
855 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_prim_interpolator_rate() local
857 for_each_set_bit(port, &wsa->active_ch_mask[dai->id], WSA_MACRO_RX_MAX) { in wsa_macro_set_prim_interpolator_rate()
907 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_mix_interpolator_rate() local
909 for_each_set_bit(port, &wsa->active_ch_mask[dai->id], WSA_MACRO_RX_MAX) { in wsa_macro_set_mix_interpolator_rate()
1000 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_get_channel_map() local
1005 *tx_slot = wsa->active_ch_mask[dai->id]; in wsa_macro_get_channel_map()
1006 *tx_num = wsa->active_ch_cnt[dai->id]; in wsa_macro_get_channel_map()
1010 for_each_set_bit(temp, &wsa->active_ch_mask[dai->id], in wsa_macro_get_channel_map()
1105 static void wsa_macro_mclk_enable(struct wsa_macro *wsa, bool mclk_enable) in wsa_macro_mclk_enable() argument
1107 struct regmap *regmap = wsa->regmap; in wsa_macro_mclk_enable()
1110 if (wsa->wsa_mclk_users == 0) { in wsa_macro_mclk_enable()
1124 wsa->wsa_mclk_users++; in wsa_macro_mclk_enable()
1126 if (wsa->wsa_mclk_users <= 0) { in wsa_macro_mclk_enable()
1127 dev_err(wsa->dev, "clock already disabled\n"); in wsa_macro_mclk_enable()
1128 wsa->wsa_mclk_users = 0; in wsa_macro_mclk_enable()
1131 wsa->wsa_mclk_users--; in wsa_macro_mclk_enable()
1132 if (wsa->wsa_mclk_users == 0) { in wsa_macro_mclk_enable()
1149 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_mclk_event() local
1151 wsa_macro_mclk_enable(wsa, event == SND_SOC_DAPM_PRE_PMU); in wsa_macro_mclk_event()
1160 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_vi_feedback() local
1163 if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { in wsa_macro_enable_vi_feedback()
1166 } else if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { in wsa_macro_enable_vi_feedback()
1297 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_config_compander() local
1299 if (!wsa->comp_enabled[comp]) in wsa_macro_config_compander()
1345 struct wsa_macro *wsa, in wsa_macro_enable_softclip_clk() argument
1355 if (wsa->softclip_clk_users[path] == 0) { in wsa_macro_enable_softclip_clk()
1364 wsa->softclip_clk_users[path]++; in wsa_macro_enable_softclip_clk()
1366 wsa->softclip_clk_users[path]--; in wsa_macro_enable_softclip_clk()
1367 if (wsa->softclip_clk_users[path] == 0) { in wsa_macro_enable_softclip_clk()
1383 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_config_softclip() local
1391 if (!wsa->is_softclip_on[softclip_path]) in wsa_macro_config_softclip()
1399 wsa_macro_enable_softclip_clk(component, wsa, softclip_path, in wsa_macro_config_softclip()
1410 wsa_macro_enable_softclip_clk(component, wsa, softclip_path, in wsa_macro_config_softclip()
1494 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_prim_interpolator() local
1500 wsa->prim_int_users[ind]++; in wsa_macro_enable_prim_interpolator()
1501 if (wsa->prim_int_users[ind] == 1) { in wsa_macro_enable_prim_interpolator()
1522 wsa->prim_int_users[ind]--; in wsa_macro_enable_prim_interpolator()
1523 if (wsa->prim_int_users[ind] == 0) { in wsa_macro_enable_prim_interpolator()
1536 struct wsa_macro *wsa, in wsa_macro_config_ear_spkr_gain() argument
1541 switch (wsa->spkr_mode) { in wsa_macro_config_ear_spkr_gain()
1555 if (wsa->comp_enabled[WSA_MACRO_COMP1] && in wsa_macro_config_ear_spkr_gain()
1557 (wsa->ear_spkr_gain != 0)) { in wsa_macro_config_ear_spkr_gain()
1559 val = comp_gain_offset + wsa->ear_spkr_gain - 1; in wsa_macro_config_ear_spkr_gain()
1568 if (wsa->comp_enabled[WSA_MACRO_COMP1] && in wsa_macro_config_ear_spkr_gain()
1570 (wsa->ear_spkr_gain != 0)) { in wsa_macro_config_ear_spkr_gain()
1587 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_interpolator() local
1606 if ((wsa->spkr_gain_offset == WSA_MACRO_GAIN_OFFSET_M1P5_DB) && in wsa_macro_enable_interpolator()
1607 (wsa->comp_enabled[WSA_MACRO_COMP1] || in wsa_macro_enable_interpolator()
1608 wsa->comp_enabled[WSA_MACRO_COMP2])) { in wsa_macro_enable_interpolator()
1628 wsa_macro_config_ear_spkr_gain(component, wsa, in wsa_macro_enable_interpolator()
1635 if ((wsa->spkr_gain_offset == WSA_MACRO_GAIN_OFFSET_M1P5_DB) && in wsa_macro_enable_interpolator()
1636 (wsa->comp_enabled[WSA_MACRO_COMP1] || in wsa_macro_enable_interpolator()
1637 wsa->comp_enabled[WSA_MACRO_COMP2])) { in wsa_macro_enable_interpolator()
1655 wsa_macro_config_ear_spkr_gain(component, wsa, in wsa_macro_enable_interpolator()
1719 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_echo() local
1739 if (wsa->ec_hq[ec_tx]) { in wsa_macro_enable_echo()
1760 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_get_ec_hq() local
1762 ucontrol->value.integer.value[0] = wsa->ec_hq[ec_tx]; in wsa_macro_get_ec_hq()
1773 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_ec_hq() local
1775 wsa->ec_hq[ec_tx] = value; in wsa_macro_set_ec_hq()
1786 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_get_compander() local
1788 ucontrol->value.integer.value[0] = wsa->comp_enabled[comp]; in wsa_macro_get_compander()
1798 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_compander() local
1800 wsa->comp_enabled[comp] = value; in wsa_macro_set_compander()
1809 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_ear_spkr_pa_gain_get() local
1811 ucontrol->value.integer.value[0] = wsa->ear_spkr_gain; in wsa_macro_ear_spkr_pa_gain_get()
1820 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_ear_spkr_pa_gain_put() local
1822 wsa->ear_spkr_gain = ucontrol->value.integer.value[0]; in wsa_macro_ear_spkr_pa_gain_put()
1834 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_rx_mux_get() local
1837 wsa->rx_port_value[widget->shift]; in wsa_macro_rx_mux_get()
1853 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_rx_mux_put() local
1855 aif_rst = wsa->rx_port_value[widget->shift]; in wsa_macro_rx_mux_put()
1864 wsa->rx_port_value[widget->shift] = rx_port_value; in wsa_macro_rx_mux_put()
1870 if (wsa->active_ch_cnt[aif_rst]) { in wsa_macro_rx_mux_put()
1872 &wsa->active_ch_mask[aif_rst]); in wsa_macro_rx_mux_put()
1873 wsa->active_ch_cnt[aif_rst]--; in wsa_macro_rx_mux_put()
1879 &wsa->active_ch_mask[rx_port_value]); in wsa_macro_rx_mux_put()
1880 wsa->active_ch_cnt[rx_port_value]++; in wsa_macro_rx_mux_put()
1884 "%s: Invalid AIF_ID for WSA RX MUX %d\n", in wsa_macro_rx_mux_put()
1898 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_soft_clip_enable_get() local
1901 ucontrol->value.integer.value[0] = wsa->is_softclip_on[path]; in wsa_macro_soft_clip_enable_get()
1910 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_soft_clip_enable_put() local
1913 wsa->is_softclip_on[path] = ucontrol->value.integer.value[0]; in wsa_macro_soft_clip_enable_put()
1956 SOC_DAPM_ENUM_EXT("WSA RX0 Mux", rx_mux_enum,
1958 SOC_DAPM_ENUM_EXT("WSA RX1 Mux", rx_mux_enum,
1960 SOC_DAPM_ENUM_EXT("WSA RX_MIX0 Mux", rx_mux_enum,
1962 SOC_DAPM_ENUM_EXT("WSA RX_MIX1 Mux", rx_mux_enum,
1972 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_vi_feed_mixer_get() local
1976 if (test_bit(spk_tx_id, &wsa->active_ch_mask[dai_id])) in wsa_macro_vi_feed_mixer_get()
1990 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_vi_feed_mixer_put() local
1997 &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { in wsa_macro_vi_feed_mixer_put()
1999 &wsa->active_ch_mask[WSA_MACRO_AIF_VI]); in wsa_macro_vi_feed_mixer_put()
2000 wsa->active_ch_cnt[WSA_MACRO_AIF_VI]++; in wsa_macro_vi_feed_mixer_put()
2004 &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { in wsa_macro_vi_feed_mixer_put()
2006 &wsa->active_ch_mask[WSA_MACRO_AIF_VI]); in wsa_macro_vi_feed_mixer_put()
2007 wsa->active_ch_cnt[WSA_MACRO_AIF_VI]++; in wsa_macro_vi_feed_mixer_put()
2012 &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { in wsa_macro_vi_feed_mixer_put()
2014 &wsa->active_ch_mask[WSA_MACRO_AIF_VI]); in wsa_macro_vi_feed_mixer_put()
2015 wsa->active_ch_cnt[WSA_MACRO_AIF_VI]--; in wsa_macro_vi_feed_mixer_put()
2019 &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { in wsa_macro_vi_feed_mixer_put()
2021 &wsa->active_ch_mask[WSA_MACRO_AIF_VI]); in wsa_macro_vi_feed_mixer_put()
2022 wsa->active_ch_cnt[WSA_MACRO_AIF_VI]--; in wsa_macro_vi_feed_mixer_put()
2040 SND_SOC_DAPM_AIF_IN("WSA AIF1 PB", "WSA_AIF1 Playback", 0,
2042 SND_SOC_DAPM_AIF_IN("WSA AIF_MIX1 PB", "WSA_AIF_MIX1 Playback", 0,
2045 SND_SOC_DAPM_AIF_OUT_E("WSA AIF_VI", "WSA_AIF_VI Capture", 0,
2049 SND_SOC_DAPM_AIF_OUT("WSA AIF_ECHO", "WSA_AIF_ECHO Capture", 0,
2054 SND_SOC_DAPM_MUX_E("WSA RX_MIX EC0_MUX", SND_SOC_NOPM,
2058 SND_SOC_DAPM_MUX_E("WSA RX_MIX EC1_MUX", SND_SOC_NOPM,
2063 SND_SOC_DAPM_MUX("WSA RX0 MUX", SND_SOC_NOPM, WSA_MACRO_RX0, 0,
2065 SND_SOC_DAPM_MUX("WSA RX1 MUX", SND_SOC_NOPM, WSA_MACRO_RX1, 0,
2067 SND_SOC_DAPM_MUX("WSA RX_MIX0 MUX", SND_SOC_NOPM, WSA_MACRO_RX_MIX0, 0,
2069 SND_SOC_DAPM_MUX("WSA RX_MIX1 MUX", SND_SOC_NOPM, WSA_MACRO_RX_MIX1, 0,
2072 SND_SOC_DAPM_MIXER("WSA RX0", SND_SOC_NOPM, 0, 0, NULL, 0),
2073 SND_SOC_DAPM_MIXER("WSA RX1", SND_SOC_NOPM, 0, 0, NULL, 0),
2074 SND_SOC_DAPM_MIXER("WSA RX_MIX0", SND_SOC_NOPM, 0, 0, NULL, 0),
2075 SND_SOC_DAPM_MIXER("WSA RX_MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
2101 SND_SOC_DAPM_INPUT("WSA SRC0_INP"),
2144 {"WSA AIF_VI", NULL, "WSA_AIF_VI Mixer"},
2145 {"WSA AIF_VI", NULL, "WSA_MCLK"},
2147 {"WSA RX_MIX EC0_MUX", "RX_MIX_TX0", "WSA_RX INT0 SEC MIX"},
2148 {"WSA RX_MIX EC1_MUX", "RX_MIX_TX0", "WSA_RX INT0 SEC MIX"},
2149 {"WSA RX_MIX EC0_MUX", "RX_MIX_TX1", "WSA_RX INT1 SEC MIX"},
2150 {"WSA RX_MIX EC1_MUX", "RX_MIX_TX1", "WSA_RX INT1 SEC MIX"},
2151 {"WSA AIF_ECHO", NULL, "WSA RX_MIX EC0_MUX"},
2152 {"WSA AIF_ECHO", NULL, "WSA RX_MIX EC1_MUX"},
2153 {"WSA AIF_ECHO", NULL, "WSA_MCLK"},
2155 {"WSA AIF1 PB", NULL, "WSA_MCLK"},
2156 {"WSA AIF_MIX1 PB", NULL, "WSA_MCLK"},
2158 {"WSA RX0 MUX", "AIF1_PB", "WSA AIF1 PB"},
2159 {"WSA RX1 MUX", "AIF1_PB", "WSA AIF1 PB"},
2160 {"WSA RX_MIX0 MUX", "AIF1_PB", "WSA AIF1 PB"},
2161 {"WSA RX_MIX1 MUX", "AIF1_PB", "WSA AIF1 PB"},
2163 {"WSA RX0 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2164 {"WSA RX1 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2165 {"WSA RX_MIX0 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2166 {"WSA RX_MIX1 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2168 {"WSA RX0", NULL, "WSA RX0 MUX"},
2169 {"WSA RX1", NULL, "WSA RX1 MUX"},
2170 {"WSA RX_MIX0", NULL, "WSA RX_MIX0 MUX"},
2171 {"WSA RX_MIX1", NULL, "WSA RX_MIX1 MUX"},
2173 {"WSA RX0", NULL, "WSA_RX0_CLK"},
2174 {"WSA RX1", NULL, "WSA_RX1_CLK"},
2175 {"WSA RX_MIX0", NULL, "WSA_RX_MIX0_CLK"},
2176 {"WSA RX_MIX1", NULL, "WSA_RX_MIX1_CLK"},
2178 {"WSA_RX0 INP0", "RX0", "WSA RX0"},
2179 {"WSA_RX0 INP0", "RX1", "WSA RX1"},
2180 {"WSA_RX0 INP0", "RX_MIX0", "WSA RX_MIX0"},
2181 {"WSA_RX0 INP0", "RX_MIX1", "WSA RX_MIX1"},
2186 {"WSA_RX0 INP1", "RX0", "WSA RX0"},
2187 {"WSA_RX0 INP1", "RX1", "WSA RX1"},
2188 {"WSA_RX0 INP1", "RX_MIX0", "WSA RX_MIX0"},
2189 {"WSA_RX0 INP1", "RX_MIX1", "WSA RX_MIX1"},
2194 {"WSA_RX0 INP2", "RX0", "WSA RX0"},
2195 {"WSA_RX0 INP2", "RX1", "WSA RX1"},
2196 {"WSA_RX0 INP2", "RX_MIX0", "WSA RX_MIX0"},
2197 {"WSA_RX0 INP2", "RX_MIX1", "WSA RX_MIX1"},
2202 {"WSA_RX0 MIX INP", "RX0", "WSA RX0"},
2203 {"WSA_RX0 MIX INP", "RX1", "WSA RX1"},
2204 {"WSA_RX0 MIX INP", "RX_MIX0", "WSA RX_MIX0"},
2205 {"WSA_RX0 MIX INP", "RX_MIX1", "WSA RX_MIX1"},
2210 {"WSA_RX0 INT0 SIDETONE MIX", "SRC0", "WSA SRC0_INP"},
2217 {"WSA_RX1 INP0", "RX0", "WSA RX0"},
2218 {"WSA_RX1 INP0", "RX1", "WSA RX1"},
2219 {"WSA_RX1 INP0", "RX_MIX0", "WSA RX_MIX0"},
2220 {"WSA_RX1 INP0", "RX_MIX1", "WSA RX_MIX1"},
2225 {"WSA_RX1 INP1", "RX0", "WSA RX0"},
2226 {"WSA_RX1 INP1", "RX1", "WSA RX1"},
2227 {"WSA_RX1 INP1", "RX_MIX0", "WSA RX_MIX0"},
2228 {"WSA_RX1 INP1", "RX_MIX1", "WSA RX_MIX1"},
2233 {"WSA_RX1 INP2", "RX0", "WSA RX0"},
2234 {"WSA_RX1 INP2", "RX1", "WSA RX1"},
2235 {"WSA_RX1 INP2", "RX_MIX0", "WSA RX_MIX0"},
2236 {"WSA_RX1 INP2", "RX_MIX1", "WSA RX_MIX1"},
2241 {"WSA_RX1 MIX INP", "RX0", "WSA RX0"},
2242 {"WSA_RX1 MIX INP", "RX1", "WSA RX1"},
2243 {"WSA_RX1 MIX INP", "RX_MIX0", "WSA RX_MIX0"},
2244 {"WSA_RX1 MIX INP", "RX_MIX1", "WSA RX_MIX1"},
2255 static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable) in wsa_swrm_clock() argument
2257 struct regmap *regmap = wsa->regmap; in wsa_swrm_clock()
2262 ret = clk_prepare_enable(wsa->mclk); in wsa_swrm_clock()
2264 dev_err(wsa->dev, "failed to enable mclk\n"); in wsa_swrm_clock()
2267 wsa_macro_mclk_enable(wsa, true); in wsa_swrm_clock()
2276 wsa_macro_mclk_enable(wsa, false); in wsa_swrm_clock()
2277 clk_disable_unprepare(wsa->mclk); in wsa_swrm_clock()
2285 struct wsa_macro *wsa = snd_soc_component_get_drvdata(comp); in wsa_macro_component_probe() local
2287 snd_soc_component_init_regmap(comp, wsa->regmap); in wsa_macro_component_probe()
2289 wsa->spkr_gain_offset = WSA_MACRO_GAIN_OFFSET_M1P5_DB; in wsa_macro_component_probe()
2317 struct wsa_macro *wsa = to_wsa_macro(hw); in swclk_gate_is_enabled() local
2320 regmap_read(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, &val); in swclk_gate_is_enabled()
2339 static int wsa_macro_register_mclk_output(struct wsa_macro *wsa) in wsa_macro_register_mclk_output() argument
2341 struct device *dev = wsa->dev; in wsa_macro_register_mclk_output()
2347 if (wsa->npl) in wsa_macro_register_mclk_output()
2348 parent_clk_name = __clk_get_name(wsa->npl); in wsa_macro_register_mclk_output()
2350 parent_clk_name = __clk_get_name(wsa->mclk); in wsa_macro_register_mclk_output()
2359 wsa->hw.init = &init; in wsa_macro_register_mclk_output()
2360 hw = &wsa->hw; in wsa_macro_register_mclk_output()
2361 ret = clk_hw_register(wsa->dev, hw); in wsa_macro_register_mclk_output()
2369 .name = "WSA MACRO",
2382 struct wsa_macro *wsa; in wsa_macro_probe() local
2389 wsa = devm_kzalloc(dev, sizeof(*wsa), GFP_KERNEL); in wsa_macro_probe()
2390 if (!wsa) in wsa_macro_probe()
2393 wsa->macro = devm_clk_get_optional(dev, "macro"); in wsa_macro_probe()
2394 if (IS_ERR(wsa->macro)) in wsa_macro_probe()
2395 return dev_err_probe(dev, PTR_ERR(wsa->macro), "unable to get macro clock\n"); in wsa_macro_probe()
2397 wsa->dcodec = devm_clk_get_optional(dev, "dcodec"); in wsa_macro_probe()
2398 if (IS_ERR(wsa->dcodec)) in wsa_macro_probe()
2399 return dev_err_probe(dev, PTR_ERR(wsa->dcodec), "unable to get dcodec clock\n"); in wsa_macro_probe()
2401 wsa->mclk = devm_clk_get(dev, "mclk"); in wsa_macro_probe()
2402 if (IS_ERR(wsa->mclk)) in wsa_macro_probe()
2403 return dev_err_probe(dev, PTR_ERR(wsa->mclk), "unable to get mclk clock\n"); in wsa_macro_probe()
2406 wsa->npl = devm_clk_get(dev, "npl"); in wsa_macro_probe()
2407 if (IS_ERR(wsa->npl)) in wsa_macro_probe()
2408 return dev_err_probe(dev, PTR_ERR(wsa->npl), "unable to get npl clock\n"); in wsa_macro_probe()
2411 wsa->fsgen = devm_clk_get(dev, "fsgen"); in wsa_macro_probe()
2412 if (IS_ERR(wsa->fsgen)) in wsa_macro_probe()
2413 return dev_err_probe(dev, PTR_ERR(wsa->fsgen), "unable to get fsgen clock\n"); in wsa_macro_probe()
2419 wsa->regmap = devm_regmap_init_mmio(dev, base, &wsa_regmap_config); in wsa_macro_probe()
2420 if (IS_ERR(wsa->regmap)) in wsa_macro_probe()
2421 return PTR_ERR(wsa->regmap); in wsa_macro_probe()
2423 dev_set_drvdata(dev, wsa); in wsa_macro_probe()
2425 wsa->dev = dev; in wsa_macro_probe()
2428 clk_set_rate(wsa->mclk, WSA_MACRO_MCLK_FREQ); in wsa_macro_probe()
2429 clk_set_rate(wsa->npl, WSA_MACRO_MCLK_FREQ); in wsa_macro_probe()
2431 ret = clk_prepare_enable(wsa->macro); in wsa_macro_probe()
2435 ret = clk_prepare_enable(wsa->dcodec); in wsa_macro_probe()
2439 ret = clk_prepare_enable(wsa->mclk); in wsa_macro_probe()
2443 ret = clk_prepare_enable(wsa->npl); in wsa_macro_probe()
2447 ret = clk_prepare_enable(wsa->fsgen); in wsa_macro_probe()
2452 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2455 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2459 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2474 ret = wsa_macro_register_mclk_output(wsa); in wsa_macro_probe()
2481 clk_disable_unprepare(wsa->fsgen); in wsa_macro_probe()
2483 clk_disable_unprepare(wsa->npl); in wsa_macro_probe()
2485 clk_disable_unprepare(wsa->mclk); in wsa_macro_probe()
2487 clk_disable_unprepare(wsa->dcodec); in wsa_macro_probe()
2489 clk_disable_unprepare(wsa->macro); in wsa_macro_probe()
2497 struct wsa_macro *wsa = dev_get_drvdata(&pdev->dev); in wsa_macro_remove() local
2499 clk_disable_unprepare(wsa->macro); in wsa_macro_remove()
2500 clk_disable_unprepare(wsa->dcodec); in wsa_macro_remove()
2501 clk_disable_unprepare(wsa->mclk); in wsa_macro_remove()
2502 clk_disable_unprepare(wsa->npl); in wsa_macro_remove()
2503 clk_disable_unprepare(wsa->fsgen); in wsa_macro_remove()
2508 struct wsa_macro *wsa = dev_get_drvdata(dev); in wsa_macro_runtime_suspend() local
2510 regcache_cache_only(wsa->regmap, true); in wsa_macro_runtime_suspend()
2511 regcache_mark_dirty(wsa->regmap); in wsa_macro_runtime_suspend()
2513 clk_disable_unprepare(wsa->fsgen); in wsa_macro_runtime_suspend()
2514 clk_disable_unprepare(wsa->npl); in wsa_macro_runtime_suspend()
2515 clk_disable_unprepare(wsa->mclk); in wsa_macro_runtime_suspend()
2522 struct wsa_macro *wsa = dev_get_drvdata(dev); in wsa_macro_runtime_resume() local
2525 ret = clk_prepare_enable(wsa->mclk); in wsa_macro_runtime_resume()
2531 ret = clk_prepare_enable(wsa->npl); in wsa_macro_runtime_resume()
2537 ret = clk_prepare_enable(wsa->fsgen); in wsa_macro_runtime_resume()
2543 regcache_cache_only(wsa->regmap, false); in wsa_macro_runtime_resume()
2544 regcache_sync(wsa->regmap); in wsa_macro_runtime_resume()
2548 clk_disable_unprepare(wsa->npl); in wsa_macro_runtime_resume()
2550 clk_disable_unprepare(wsa->mclk); in wsa_macro_runtime_resume()
2561 .compatible = "qcom,sc7280-lpass-wsa-macro",
2564 .compatible = "qcom,sm8250-lpass-wsa-macro",
2567 .compatible = "qcom,sm8450-lpass-wsa-macro",
2570 .compatible = "qcom,sm8550-lpass-wsa-macro",
2572 .compatible = "qcom,sc8280xp-lpass-wsa-macro",
2590 MODULE_DESCRIPTION("WSA macro driver");