Lines Matching full:rx1
631 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
635 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
645 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1677 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
2953 SND_SOC_DAPM_MUX("RX_MACRO RX1 MUX", SND_SOC_NOPM, RX_MACRO_RX1, 0,
3093 {"RX_MACRO RX1 MUX", "AIF1_PB", "RX AIF1 PB"},
3100 {"RX_MACRO RX1 MUX", "AIF2_PB", "RX AIF2 PB"},
3107 {"RX_MACRO RX1 MUX", "AIF3_PB", "RX AIF3 PB"},
3114 {"RX_MACRO RX1 MUX", "AIF4_PB", "RX AIF4 PB"},
3121 {"RX_RX1", NULL, "RX_MACRO RX1 MUX"},
3128 {"RX INT0_1 MIX1 INP0", "RX1", "RX_RX1"},
3138 {"RX INT0_1 MIX1 INP1", "RX1", "RX_RX1"},
3148 {"RX INT0_1 MIX1 INP2", "RX1", "RX_RX1"},
3159 {"RX INT1_1 MIX1 INP0", "RX1", "RX_RX1"},
3169 {"RX INT1_1 MIX1 INP1", "RX1", "RX_RX1"},
3179 {"RX INT1_1 MIX1 INP2", "RX1", "RX_RX1"},
3190 {"RX INT2_1 MIX1 INP0", "RX1", "RX_RX1"},
3200 {"RX INT2_1 MIX1 INP1", "RX1", "RX_RX1"},
3210 {"RX INT2_1 MIX1 INP2", "RX1", "RX_RX1"},
3246 {"RX INT0_2 MUX", "RX1", "RX_RX1"},
3256 {"RX INT1_2 MUX", "RX1", "RX_RX1"},
3266 {"RX INT2_2 MUX", "RX1", "RX_RX1"},
3305 {"IIR0 INP0 MUX", "RX1", "RX_RX1"},
3316 {"IIR0 INP1 MUX", "RX1", "RX_RX1"},
3327 {"IIR0 INP2 MUX", "RX1", "RX_RX1"},
3338 {"IIR0 INP3 MUX", "RX1", "RX_RX1"},
3351 {"IIR1 INP0 MUX", "RX1", "RX_RX1"},
3362 {"IIR1 INP1 MUX", "RX1", "RX_RX1"},
3373 {"IIR1 INP2 MUX", "RX1", "RX_RX1"},
3384 {"IIR1 INP3 MUX", "RX1", "RX_RX1"},