Lines Matching full:rx0
631 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
635 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
645 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1677 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
2951 SND_SOC_DAPM_MUX("RX_MACRO RX0 MUX", SND_SOC_NOPM, RX_MACRO_RX0, 0,
3092 {"RX_MACRO RX0 MUX", "AIF1_PB", "RX AIF1 PB"},
3099 {"RX_MACRO RX0 MUX", "AIF2_PB", "RX AIF2 PB"},
3106 {"RX_MACRO RX0 MUX", "AIF3_PB", "RX AIF3 PB"},
3113 {"RX_MACRO RX0 MUX", "AIF4_PB", "RX AIF4 PB"},
3120 {"RX_RX0", NULL, "RX_MACRO RX0 MUX"},
3127 {"RX INT0_1 MIX1 INP0", "RX0", "RX_RX0"},
3137 {"RX INT0_1 MIX1 INP1", "RX0", "RX_RX0"},
3147 {"RX INT0_1 MIX1 INP2", "RX0", "RX_RX0"},
3158 {"RX INT1_1 MIX1 INP0", "RX0", "RX_RX0"},
3168 {"RX INT1_1 MIX1 INP1", "RX0", "RX_RX0"},
3178 {"RX INT1_1 MIX1 INP2", "RX0", "RX_RX0"},
3189 {"RX INT2_1 MIX1 INP0", "RX0", "RX_RX0"},
3199 {"RX INT2_1 MIX1 INP1", "RX0", "RX_RX0"},
3209 {"RX INT2_1 MIX1 INP2", "RX0", "RX_RX0"},
3245 {"RX INT0_2 MUX", "RX0", "RX_RX0"},
3255 {"RX INT1_2 MUX", "RX0", "RX_RX0"},
3265 {"RX INT2_2 MUX", "RX0", "RX_RX0"},
3304 {"IIR0 INP0 MUX", "RX0", "RX_RX0"},
3315 {"IIR0 INP1 MUX", "RX0", "RX_RX0"},
3326 {"IIR0 INP2 MUX", "RX0", "RX_RX0"},
3337 {"IIR0 INP3 MUX", "RX0", "RX_RX0"},
3350 {"IIR1 INP0 MUX", "RX0", "RX_RX0"},
3361 {"IIR1 INP1 MUX", "RX0", "RX_RX0"},
3372 {"IIR1 INP2 MUX", "RX0", "RX_RX0"},
3383 {"IIR1 INP3 MUX", "RX0", "RX_RX0"},