Lines Matching +full:dsp +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0
3 // cs35l45.c - CS35L45 ALSA SoC audio driver
5 // Copyright 2019-2022 Cirrus Logic, Inc.
53 if (!cs35l45->dsp.cs_dsp.running) { in cs35l45_set_cspl_mbox_cmd()
54 dev_err(cs35l45->dev, "DSP not running\n"); in cs35l45_set_cspl_mbox_cmd()
55 return -EPERM; in cs35l45_set_cspl_mbox_cmd()
62 dev_err(cs35l45->dev, "Failed to write MBOX: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()
72 dev_err(cs35l45->dev, "Failed to read MBOX STS: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()
77 dev_dbg(cs35l45->dev, "[%u] cmd %u returned invalid sts %u", i, cmd, sts); in cs35l45_set_cspl_mbox_cmd()
83 dev_err(cs35l45->dev, "Failed to set mailbox cmd %u (status %u)\n", cmd, sts); in cs35l45_set_cspl_mbox_cmd()
85 return -ENOMSG; in cs35l45_set_cspl_mbox_cmd()
91 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs35l45_global_en_ev()
94 dev_dbg(cs35l45->dev, "%s event : %x\n", __func__, event); in cs35l45_global_en_ev()
98 regmap_write(cs35l45->regmap, CS35L45_GLOBAL_ENABLES, in cs35l45_global_en_ev()
106 regmap_write(cs35l45->regmap, CS35L45_GLOBAL_ENABLES, 0); in cs35l45_global_en_ev()
118 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs35l45_dsp_preload_ev()
124 if (cs35l45->dsp.cs_dsp.booted) in cs35l45_dsp_preload_ev()
129 if (cs35l45->dsp.cs_dsp.running) in cs35l45_dsp_preload_ev()
132 regmap_set_bits(cs35l45->regmap, CS35L45_PWRMGT_CTL, in cs35l45_dsp_preload_ev()
137 if (cs35l45->dsp.preloaded) in cs35l45_dsp_preload_ev()
140 if (cs35l45->dsp.cs_dsp.running) { in cs35l45_dsp_preload_ev()
155 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs35l45_dsp_audio_ev()
160 return cs35l45_set_cspl_mbox_cmd(cs35l45, cs35l45->regmap, in cs35l45_dsp_audio_ev()
163 return cs35l45_set_cspl_mbox_cmd(cs35l45, cs35l45->regmap, in cs35l45_dsp_audio_ev()
175 struct snd_card *card = component->card->snd_card; in cs35l45_activate_ctl()
181 if (component->name_prefix) in cs35l45_activate_ctl()
183 component->name_prefix, ctl_name); in cs35l45_activate_ctl()
187 kcontrol = snd_soc_card_get_kcontrol_locked(component->card, name); in cs35l45_activate_ctl()
189 dev_err(component->dev, "Can't find kcontrol %s\n", name); in cs35l45_activate_ctl()
190 return -EINVAL; in cs35l45_activate_ctl()
193 index_offset = snd_ctl_get_ioff(kcontrol, &kcontrol->id); in cs35l45_activate_ctl()
194 vd = &kcontrol->vd[index_offset]; in cs35l45_activate_ctl()
196 vd->access |= SNDRV_CTL_ELEM_ACCESS_WRITE; in cs35l45_activate_ctl()
198 vd->access &= ~SNDRV_CTL_ELEM_ACCESS_WRITE; in cs35l45_activate_ctl()
200 snd_ctl_notify(card, SNDRV_CTL_EVENT_MASK_INFO, &kcontrol->id); in cs35l45_activate_ctl()
213 ucontrol->value.integer.value[0] = cs35l45->amplifier_mode; in cs35l45_amplifier_mode_get()
230 if ((ucontrol->value.integer.value[0] == cs35l45->amplifier_mode) || in cs35l45_amplifier_mode_put()
231 (ucontrol->value.integer.value[0] > AMP_MODE_RCV)) in cs35l45_amplifier_mode_put()
236 ret = regmap_read(cs35l45->regmap, CS35L45_BLOCK_ENABLES, &_state); in cs35l45_amplifier_mode_put()
238 dev_err(cs35l45->dev, "Failed to read AMP state: %d\n", ret); in cs35l45_amplifier_mode_put()
243 regmap_clear_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES, in cs35l45_amplifier_mode_put()
248 if (ucontrol->value.integer.value[0] == AMP_MODE_SPK) { in cs35l45_amplifier_mode_put()
249 regmap_clear_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES, in cs35l45_amplifier_mode_put()
252 regmap_update_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES, in cs35l45_amplifier_mode_put()
256 regmap_update_bits(cs35l45->regmap, CS35L45_HVLV_CONFIG, in cs35l45_amplifier_mode_put()
263 dev_err(cs35l45->dev, in cs35l45_amplifier_mode_put()
267 regmap_set_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES, in cs35l45_amplifier_mode_put()
270 regmap_update_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES, in cs35l45_amplifier_mode_put()
275 regmap_update_bits(cs35l45->regmap, CS35L45_HVLV_CONFIG, in cs35l45_amplifier_mode_put()
280 regmap_clear_bits(cs35l45->regmap, in cs35l45_amplifier_mode_put()
284 regmap_update_bits(cs35l45->regmap, CS35L45_AMP_GAIN, in cs35l45_amplifier_mode_put()
291 dev_err(cs35l45->dev, in cs35l45_amplifier_mode_put()
296 regmap_set_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES, in cs35l45_amplifier_mode_put()
303 cs35l45->amplifier_mode = ucontrol->value.integer.value[0]; in cs35l45_amplifier_mode_put()
601 static const DECLARE_TLV_DB_SCALE(cs35l45_dig_pcm_vol_tlv, -10225, 25, true);
614 -409, 48,
615 (CS35L45_AMP_VOL_PCM_WIDTH - 1) - 1,
628 dev_err(cs35l45->dev, "Invalid freq: %u\n", freq); in cs35l45_set_pll()
629 return -EINVAL; in cs35l45_set_pll()
632 regmap_read(cs35l45->regmap, CS35L45_REFCLK_INPUT, &val); in cs35l45_set_pll()
637 regmap_set_bits(cs35l45->regmap, CS35L45_REFCLK_INPUT, CS35L45_PLL_OPEN_LOOP_MASK); in cs35l45_set_pll()
638 regmap_update_bits(cs35l45->regmap, CS35L45_REFCLK_INPUT, in cs35l45_set_pll()
641 regmap_clear_bits(cs35l45->regmap, CS35L45_REFCLK_INPUT, CS35L45_PLL_REFCLK_EN_MASK); in cs35l45_set_pll()
642 regmap_clear_bits(cs35l45->regmap, CS35L45_REFCLK_INPUT, CS35L45_PLL_OPEN_LOOP_MASK); in cs35l45_set_pll()
643 regmap_set_bits(cs35l45->regmap, CS35L45_REFCLK_INPUT, CS35L45_PLL_REFCLK_EN_MASK); in cs35l45_set_pll()
650 struct cs35l45_private *cs35l45 = snd_soc_component_get_drvdata(codec_dai->component); in cs35l45_asp_set_fmt()
657 dev_err(cs35l45->dev, "Invalid DAI clocking\n"); in cs35l45_asp_set_fmt()
658 return -EINVAL; in cs35l45_asp_set_fmt()
669 dev_err(cs35l45->dev, "Invalid DAI format\n"); in cs35l45_asp_set_fmt()
670 return -EINVAL; in cs35l45_asp_set_fmt()
691 dev_warn(cs35l45->dev, "Invalid DAI clock polarity\n"); in cs35l45_asp_set_fmt()
692 return -EINVAL; in cs35l45_asp_set_fmt()
695 regmap_update_bits(cs35l45->regmap, CS35L45_ASP_CONTROL2, in cs35l45_asp_set_fmt()
710 struct cs35l45_private *cs35l45 = snd_soc_component_get_drvdata(dai->component); in cs35l45_asp_hw_params()
728 dev_warn(cs35l45->dev, "Unsupported sample rate (%d)\n", in cs35l45_asp_hw_params()
730 return -EINVAL; in cs35l45_asp_hw_params()
733 regmap_update_bits(cs35l45->regmap, CS35L45_GLOBAL_SAMPLE_RATE, in cs35l45_asp_hw_params()
739 if (cs35l45->slot_width) in cs35l45_asp_hw_params()
740 asp_width = cs35l45->slot_width; in cs35l45_asp_hw_params()
744 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in cs35l45_asp_hw_params()
745 regmap_update_bits(cs35l45->regmap, CS35L45_ASP_CONTROL2, in cs35l45_asp_hw_params()
749 regmap_update_bits(cs35l45->regmap, CS35L45_ASP_DATA_CONTROL5, in cs35l45_asp_hw_params()
753 regmap_update_bits(cs35l45->regmap, CS35L45_ASP_CONTROL2, in cs35l45_asp_hw_params()
757 regmap_update_bits(cs35l45->regmap, CS35L45_ASP_DATA_CONTROL1, in cs35l45_asp_hw_params()
762 if (cs35l45->sysclk_set) in cs35l45_asp_hw_params()
766 regmap_read(cs35l45->regmap, CS35L45_ASP_CONTROL2, &asp_fmt); in cs35l45_asp_hw_params()
774 cs35l45->slot_count, slot_multiple); in cs35l45_asp_hw_params()
783 struct cs35l45_private *cs35l45 = snd_soc_component_get_drvdata(dai->component); in cs35l45_asp_set_tdm_slot()
786 return -EINVAL; in cs35l45_asp_set_tdm_slot()
788 cs35l45->slot_width = slot_width; in cs35l45_asp_set_tdm_slot()
789 cs35l45->slot_count = slots; in cs35l45_asp_set_tdm_slot()
797 struct cs35l45_private *cs35l45 = snd_soc_component_get_drvdata(dai->component); in cs35l45_asp_set_sysclk()
801 dev_err(cs35l45->dev, "Invalid clk_id %d\n", clk_id); in cs35l45_asp_set_sysclk()
802 return -EINVAL; in cs35l45_asp_set_sysclk()
805 cs35l45->sysclk_set = false; in cs35l45_asp_set_sysclk()
811 return -EINVAL; in cs35l45_asp_set_sysclk()
813 cs35l45->sysclk_set = true; in cs35l45_asp_set_sysclk()
820 struct cs35l45_private *cs35l45 = snd_soc_component_get_drvdata(dai->component); in cs35l45_mute_stream()
826 regmap_read(cs35l45->regmap, CS35L45_GLOBAL_SAMPLE_RATE, &global_fs); in cs35l45_mute_stream()
840 regmap_read(cs35l45->regmap, CS35L45_AMP_PCM_HPF_TST, &val); in cs35l45_mute_stream()
851 regmap_multi_reg_write(cs35l45->regmap, hpf_override_seq, in cs35l45_mute_stream()
893 return wm_adsp2_component_probe(&cs35l45->dsp, component); in cs35l45_component_probe()
900 wm_adsp2_component_remove(&cs35l45->dsp, component); in cs35l45_component_remove()
925 if (cs35l45->bus_type == CONTROL_BUS_I2C) in cs35l45_setup_hibernate()
930 regmap_update_bits(cs35l45->regmap, CS35L45_WAKESRC_CTL, in cs35l45_setup_hibernate()
934 regmap_set_bits(cs35l45->regmap, CS35L45_WAKESRC_CTL, in cs35l45_setup_hibernate()
937 regmap_update_bits(cs35l45->regmap, CS35L45_WKI2C_CTL, in cs35l45_setup_hibernate()
938 CS35L45_WKI2C_ADDR_MASK, cs35l45->i2c_addr); in cs35l45_setup_hibernate()
940 regmap_set_bits(cs35l45->regmap, CS35L45_WKI2C_CTL, in cs35l45_setup_hibernate()
946 dev_dbg(cs35l45->dev, "Enter hibernate\n"); in cs35l45_enter_hibernate()
950 regmap_set_bits(cs35l45->regmap, CS35L45_IRQ1_MASK_2, CS35L45_DSP_VIRT2_MBOX_MASK); in cs35l45_enter_hibernate()
953 regmap_write(cs35l45->regmap, CS35L45_DSP_VIRT1_MBOX_1, CSPL_MBOX_CMD_HIBERNATE); in cs35l45_enter_hibernate()
965 dev_dbg(cs35l45->dev, "Exit hibernate\n"); in cs35l45_exit_hibernate()
968 ret = cs35l45_set_cspl_mbox_cmd(cs35l45, cs35l45->regmap, in cs35l45_exit_hibernate()
971 dev_dbg(cs35l45->dev, "Wake success at cycle: %d\n", j); in cs35l45_exit_hibernate()
972 regmap_clear_bits(cs35l45->regmap, CS35L45_IRQ1_MASK_2, in cs35l45_exit_hibernate()
979 dev_err(cs35l45->dev, "Wake failed, re-enter hibernate: %d\n", ret); in cs35l45_exit_hibernate()
984 dev_err(cs35l45->dev, "Timed out waking device\n"); in cs35l45_exit_hibernate()
986 return -ETIMEDOUT; in cs35l45_exit_hibernate()
993 if (!cs35l45->dsp.preloaded || !cs35l45->dsp.cs_dsp.running) in cs35l45_runtime_suspend()
998 regcache_cache_only(cs35l45->regmap, true); in cs35l45_runtime_suspend()
999 regcache_mark_dirty(cs35l45->regmap); in cs35l45_runtime_suspend()
1001 dev_dbg(cs35l45->dev, "Runtime suspended\n"); in cs35l45_runtime_suspend()
1011 if (!cs35l45->dsp.preloaded || !cs35l45->dsp.cs_dsp.running) in cs35l45_runtime_resume()
1014 dev_dbg(cs35l45->dev, "Runtime resume\n"); in cs35l45_runtime_resume()
1016 regcache_cache_only(cs35l45->regmap, false); in cs35l45_runtime_resume()
1022 ret = regcache_sync(cs35l45->regmap); in cs35l45_runtime_resume()
1024 dev_warn(cs35l45->dev, "regcache_sync failed: %d\n", ret); in cs35l45_runtime_resume()
1027 regmap_clear_bits(cs35l45->regmap, CS35L45_ERROR_RELEASE, CS35L45_GLOBAL_ERR_RLS_MASK); in cs35l45_runtime_resume()
1028 regmap_set_bits(cs35l45->regmap, CS35L45_ERROR_RELEASE, CS35L45_GLOBAL_ERR_RLS_MASK); in cs35l45_runtime_resume()
1029 regmap_clear_bits(cs35l45->regmap, CS35L45_ERROR_RELEASE, CS35L45_GLOBAL_ERR_RLS_MASK); in cs35l45_runtime_resume()
1037 dev_dbg(cs35l45->dev, "System suspend, disabling IRQ\n"); in cs35l45_sys_suspend()
1038 disable_irq(cs35l45->irq); in cs35l45_sys_suspend()
1047 dev_dbg(cs35l45->dev, "Late system suspend, reenabling IRQ\n"); in cs35l45_sys_suspend_noirq()
1048 enable_irq(cs35l45->irq); in cs35l45_sys_suspend_noirq()
1057 dev_dbg(cs35l45->dev, "Early system resume, disabling IRQ\n"); in cs35l45_sys_resume_noirq()
1058 disable_irq(cs35l45->irq); in cs35l45_sys_resume_noirq()
1067 dev_dbg(cs35l45->dev, "System resume, reenabling IRQ\n"); in cs35l45_sys_resume()
1068 enable_irq(cs35l45->irq); in cs35l45_sys_resume()
1075 struct device_node *node = cs35l45->dev->of_node; in cs35l45_apply_property_config()
1089 sprintf(of_name, "cirrus,gpio-ctrl%d", i + 1); in cs35l45_apply_property_config()
1094 ret = of_property_read_u32(child, "gpio-dir", &val); in cs35l45_apply_property_config()
1096 regmap_update_bits(cs35l45->regmap, gpio_regs[i], in cs35l45_apply_property_config()
1100 ret = of_property_read_u32(child, "gpio-lvl", &val); in cs35l45_apply_property_config()
1102 regmap_update_bits(cs35l45->regmap, gpio_regs[i], in cs35l45_apply_property_config()
1106 ret = of_property_read_u32(child, "gpio-op-cfg", &val); in cs35l45_apply_property_config()
1108 regmap_update_bits(cs35l45->regmap, gpio_regs[i], in cs35l45_apply_property_config()
1112 ret = of_property_read_u32(child, "gpio-pol", &val); in cs35l45_apply_property_config()
1114 regmap_update_bits(cs35l45->regmap, gpio_regs[i], in cs35l45_apply_property_config()
1118 ret = of_property_read_u32(child, "gpio-ctrl", &val); in cs35l45_apply_property_config()
1120 regmap_update_bits(cs35l45->regmap, pad_regs[i], in cs35l45_apply_property_config()
1124 ret = of_property_read_u32(child, "gpio-invert", &val); in cs35l45_apply_property_config()
1126 regmap_update_bits(cs35l45->regmap, pad_regs[i], in cs35l45_apply_property_config()
1130 cs35l45->irq_invert = val; in cs35l45_apply_property_config()
1136 if (device_property_read_u32(cs35l45->dev, in cs35l45_apply_property_config()
1137 "cirrus,asp-sdout-hiz-ctrl", &val) == 0) { in cs35l45_apply_property_config()
1138 regmap_update_bits(cs35l45->regmap, CS35L45_ASP_CONTROL3, in cs35l45_apply_property_config()
1166 dev_info(cs35l45->dev, "MBOX event (SPEAKER_STATUS): %s\n", in cs35l45_dsp_virt2_mbox3_irq_handle()
1170 dev_dbg(cs35l45->dev, "MBOX event (BOOT_DONE)\n"); in cs35l45_dsp_virt2_mbox3_irq_handle()
1173 dev_err(cs35l45->dev, "MBOX event not supported %u\n", cmd); in cs35l45_dsp_virt2_mbox3_irq_handle()
1174 return -EINVAL; in cs35l45_dsp_virt2_mbox3_irq_handle()
1186 ret = regmap_read(cs35l45->regmap, CS35L45_DSP_VIRT2_MBOX_3, &mbox_val); in cs35l45_dsp_virt2_mbox_cb()
1191 /* Handle DSP trace log IRQ */ in cs35l45_dsp_virt2_mbox_cb()
1192 ret = regmap_read(cs35l45->regmap, CS35L45_DSP_VIRT2_MBOX_4, &mbox_val); in cs35l45_dsp_virt2_mbox_cb()
1194 dev_err(cs35l45->dev, "Spurious DSP MBOX4 IRQ\n"); in cs35l45_dsp_virt2_mbox_cb()
1204 dev_dbg(cs35l45->dev, "PLL unlock detected!"); in cs35l45_pll_unlock()
1213 dev_dbg(cs35l45->dev, "PLL lock detected!"); in cs35l45_pll_lock()
1229 CS35L45_IRQ(DSP_WDT_EXPIRE, "DSP Watchdog Timer", cs35l45_spk_safe_err),
1232 CS35L45_IRQ(DSP_VIRT2_MBOX, "DSP virtual MBOX 2 write flag", cs35l45_dsp_virt2_mbox_cb),
1240 i = irq - regmap_irq_get_virq(cs35l45->irq_data, 0); in cs35l45_spk_safe_err()
1243 dev_err(cs35l45->dev, "Unspecified global error condition (%d) detected!\n", irq); in cs35l45_spk_safe_err()
1245 dev_err(cs35l45->dev, "%s condition detected!\n", cs35l45_irqs[i].name); in cs35l45_spk_safe_err()
1279 struct device *dev = cs35l45->dev; in cs35l45_initialize()
1284 ret = regmap_read_poll_timeout(cs35l45->regmap, CS35L45_IRQ1_EINT_4, sts, in cs35l45_initialize()
1288 dev_err(cs35l45->dev, "Timeout waiting for OTP boot\n"); in cs35l45_initialize()
1292 ret = regmap_bulk_read(cs35l45->regmap, CS35L45_DEVID, dev_id, ARRAY_SIZE(dev_id)); in cs35l45_initialize()
1294 dev_err(cs35l45->dev, "Get Device ID failed: %d\n", ret); in cs35l45_initialize()
1303 dev_err(cs35l45->dev, "Bad DEVID 0x%x\n", dev_id[0]); in cs35l45_initialize()
1304 return -ENODEV; in cs35l45_initialize()
1307 dev_info(cs35l45->dev, "Cirrus Logic CS35L45: REVID %02X OTPID %02X\n", in cs35l45_initialize()
1310 regmap_write(cs35l45->regmap, CS35L45_IRQ1_EINT_4, in cs35l45_initialize()
1323 cs35l45->amplifier_mode = AMP_MODE_SPK; in cs35l45_initialize()
1357 struct wm_adsp *dsp = &cs35l45->dsp; in cs35l45_dsp_init() local
1360 dsp->part = "cs35l45"; in cs35l45_dsp_init()
1361 dsp->fw = 9; /* 9 is WM_ADSP_FW_SPK_PROT in wm_adsp.c */ in cs35l45_dsp_init()
1362 dsp->toggle_preload = true; in cs35l45_dsp_init()
1363 dsp->cs_dsp.num = 1; in cs35l45_dsp_init()
1364 dsp->cs_dsp.type = WMFW_HALO; in cs35l45_dsp_init()
1365 dsp->cs_dsp.rev = 0; in cs35l45_dsp_init()
1366 dsp->cs_dsp.dev = cs35l45->dev; in cs35l45_dsp_init()
1367 dsp->cs_dsp.regmap = cs35l45->regmap; in cs35l45_dsp_init()
1368 dsp->cs_dsp.base = CS35L45_DSP1_CLOCK_FREQ; in cs35l45_dsp_init()
1369 dsp->cs_dsp.base_sysinfo = CS35L45_DSP1_SYS_ID; in cs35l45_dsp_init()
1370 dsp->cs_dsp.mem = cs35l45_dsp1_regions; in cs35l45_dsp_init()
1371 dsp->cs_dsp.num_mems = ARRAY_SIZE(cs35l45_dsp1_regions); in cs35l45_dsp_init()
1372 dsp->cs_dsp.lock_regions = 0xFFFFFFFF; in cs35l45_dsp_init()
1374 ret = wm_halo_init(dsp); in cs35l45_dsp_init()
1376 regmap_multi_reg_write(cs35l45->regmap, cs35l45_fs_errata_patch, in cs35l45_dsp_init()
1384 struct device *dev = cs35l45->dev; in cs35l45_probe()
1388 cs35l45->vdd_batt = devm_regulator_get(dev, "vdd-batt"); in cs35l45_probe()
1389 if (IS_ERR(cs35l45->vdd_batt)) in cs35l45_probe()
1390 return dev_err_probe(dev, PTR_ERR(cs35l45->vdd_batt), in cs35l45_probe()
1391 "Failed to request vdd-batt\n"); in cs35l45_probe()
1393 cs35l45->vdd_a = devm_regulator_get(dev, "vdd-a"); in cs35l45_probe()
1394 if (IS_ERR(cs35l45->vdd_a)) in cs35l45_probe()
1395 return dev_err_probe(dev, PTR_ERR(cs35l45->vdd_a), in cs35l45_probe()
1396 "Failed to request vdd-a\n"); in cs35l45_probe()
1399 ret = regulator_enable(cs35l45->vdd_batt); in cs35l45_probe()
1401 return dev_err_probe(dev, ret, "Failed to enable vdd-batt\n"); in cs35l45_probe()
1403 ret = regulator_enable(cs35l45->vdd_a); in cs35l45_probe()
1405 return dev_err_probe(dev, ret, "Failed to enable vdd-a\n"); in cs35l45_probe()
1408 cs35l45->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in cs35l45_probe()
1409 if (IS_ERR(cs35l45->reset_gpio)) { in cs35l45_probe()
1410 ret = PTR_ERR(cs35l45->reset_gpio); in cs35l45_probe()
1411 cs35l45->reset_gpio = NULL; in cs35l45_probe()
1412 if (ret == -EBUSY) { in cs35l45_probe()
1420 if (cs35l45->reset_gpio) { in cs35l45_probe()
1422 gpiod_set_value_cansleep(cs35l45->reset_gpio, 1); in cs35l45_probe()
1435 pm_runtime_set_autosuspend_delay(cs35l45->dev, 3000); in cs35l45_probe()
1436 pm_runtime_use_autosuspend(cs35l45->dev); in cs35l45_probe()
1437 pm_runtime_mark_last_busy(cs35l45->dev); in cs35l45_probe()
1438 pm_runtime_set_active(cs35l45->dev); in cs35l45_probe()
1439 pm_runtime_get_noresume(cs35l45->dev); in cs35l45_probe()
1440 pm_runtime_enable(cs35l45->dev); in cs35l45_probe()
1442 if (cs35l45->irq) { in cs35l45_probe()
1443 if (cs35l45->irq_invert) in cs35l45_probe()
1448 ret = devm_regmap_add_irq_chip(dev, cs35l45->regmap, cs35l45->irq, irq_pol, 0, in cs35l45_probe()
1449 &cs35l45_regmap_irq_chip, &cs35l45->irq_data); in cs35l45_probe()
1456 irq = regmap_irq_get_virq(cs35l45->irq_data, cs35l45_irqs[i].irq); in cs35l45_probe()
1479 pm_runtime_put_autosuspend(cs35l45->dev); in cs35l45_probe()
1484 pm_runtime_disable(cs35l45->dev); in cs35l45_probe()
1485 pm_runtime_put_noidle(cs35l45->dev); in cs35l45_probe()
1486 wm_adsp2_remove(&cs35l45->dsp); in cs35l45_probe()
1489 gpiod_set_value_cansleep(cs35l45->reset_gpio, 0); in cs35l45_probe()
1491 regulator_disable(cs35l45->vdd_a); in cs35l45_probe()
1492 regulator_disable(cs35l45->vdd_batt); in cs35l45_probe()
1500 pm_runtime_get_sync(cs35l45->dev); in cs35l45_remove()
1501 pm_runtime_disable(cs35l45->dev); in cs35l45_remove()
1502 wm_adsp2_remove(&cs35l45->dsp); in cs35l45_remove()
1504 gpiod_set_value_cansleep(cs35l45->reset_gpio, 0); in cs35l45_remove()
1506 pm_runtime_put_noidle(cs35l45->dev); in cs35l45_remove()
1507 regulator_disable(cs35l45->vdd_a); in cs35l45_remove()
1508 /* VDD_BATT must be the last to power-off */ in cs35l45_remove()
1509 regulator_disable(cs35l45->vdd_batt); in cs35l45_remove()