76 	struct clk			*sclk;  member
116 		clk_prepare_enable(info->sclk);  in ep93xx_i2s_enable()
161 		clk_disable_unprepare(info->sclk);  in ep93xx_i2s_disable()
337 	 * EP93xx I2S module can be setup so SCLK / LRCLK value can be  in ep93xx_i2s_hw_params()
338 	 * 32, 64, 128. MCLK / SCLK value can be 2 and 4.  in ep93xx_i2s_hw_params()
339 	 * We set LRCLK equal to `rate' and minimum SCLK / LRCLK   in ep93xx_i2s_hw_params()
354 	err = clk_set_rate(info->sclk, clk_get_rate(info->mclk) / sdiv);  in ep93xx_i2s_hw_params()
358 	err = clk_set_rate(info->lrclk, clk_get_rate(info->sclk) / lrdiv);  in ep93xx_i2s_hw_params()
474 	info->sclk = clk_get(&pdev->dev, "sclk");  in ep93xx_i2s_probe()
475 	if (IS_ERR(info->sclk)) {  in ep93xx_i2s_probe()
476 		err = PTR_ERR(info->sclk);  in ep93xx_i2s_probe()
502 	clk_put(info->sclk);  in ep93xx_i2s_probe()
514 	clk_put(info->sclk);  in ep93xx_i2s_remove()