Lines Matching +full:needs +full:- +full:reset +full:- +full:on +full:- +full:resume

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
16 #include <linux/blk-crypto-profile.h>
17 #include <linux/blk-mq.h>
19 #include <linux/fault-inject.h>
22 #include <linux/dma-direction.h>
67 * struct uic_command - UIC command structure
91 /* Host <-> Device UniPro Link state */
99 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
100 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
102 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
104 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
106 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
107 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
109 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
111 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
115 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
117 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
119 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
121 ((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
123 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
125 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
127 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
129 ((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
134 * which is lower than PowerDown with power on but not PowerDown with
154 * struct ufshcd_lrb - local reference block
173 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
193 u8 lun; /* UPIU LUN id field is only 8-bit wide */
208 * struct ufs_query_req - parameters for building a query request
218 * struct ufs_query_resp - UPIU QUERY
227 * struct ufs_query - holds relevant data structures for query request
239 * struct ufs_dev_cmd - all assosiated fields with device management commands
240 * @type: device management command type - Query, NOP OUT
253 * struct ufs_clk_info - UFS clock related info
254 * @list: list headed by hba->clk_list_head
296 * struct ufs_hba_variant_ops - variant specific callbacks
304 * variant specific Uni-Pro initialization.
306 * to allow variant specific Uni-Pro initialization.
318 * @resume: called during host controller PM callback
321 * @device_reset: called to issue a reset pulse on the UFS device
358 int (*resume)(struct ufs_hba *, enum ufs_pm_op); member
388 * struct ufs_clk_gating - UFS clock gating related info
391 * @ungate_work: worker to turn on clocks that will be used in case of
396 * during suspend/resume
420 * struct ufs_clk_scaling - UFS clock scaling related data
422 * devfreq ->target() function is called then schedule "suspend_work" to
430 * @workq: workqueue to schedule devfreq suspend/resume work
432 * @resume_work: worker to resume devfreq
464 * struct ufs_event_hist - keeps history of errors
478 * struct ufs_stats - keeps usage/err statistics
482 * reset this after link-startup.
497 * enum ufshcd_state - UFS host controller state
531 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
544 * This quirk needs to be enabled if the host controller only allows
551 * This quirk needs to be enabled if the host controller doesn't
564 * This quirk needs to be enabled if host controller doesn't allow
565 * that the interrupt aggregation timer and counter are reset by s/w.
570 * This quirks needs to be enabled if host controller cannot be
576 * This quirk needs to be enabled if the host controller regards
582 * This quirk needs to be enabled if the host controller reports
588 * This quirk needs to be enabled if the host controller has
589 * auto-hibernate capability but it doesn't work.
594 * This quirk needs to disable manual flush for write booster
599 * This quirk needs to disable unipro timeout values
605 * This quirk needs to be enabled if the host controller does not
611 * This quirk needs to be enabled if the host controller cannot
617 * This quirk needs to be enabled if the host controller has
618 * 64-bit addressing supported capability but it doesn't work.
623 * This quirk needs to be enabled if the host controller has
624 * auto-hibernate capability but it's FASTAUTO only.
629 * This quirk needs to be enabled if the host controller needs
669 * This capability allows the device auto-bkops to be always enabled
685 * This capability allows the host controller driver to turn-on
707 * support device hardware reset via the hba->device_reset() callback,
752 * struct ufshcd_res_info_t - MCQ related resource regions
776 * struct ufshcd_mcq_opr_info_t - Operation and Runtime registers
797 * struct ufs_hba - per adapter private structure
814 * @ahit: value of Auto-Hibernate Idle Timer register.
850 * @eh_wq: Workqueue that eh_work works on
858 * @force_reset: flag to force eh_work perform a full reset
878 * @system_suspending: system suspend has been started and system resume has
947 /* Auto-Hibernate Idle Timer register value */
1086 * struct ufs_hw_queue - per hardware queue structure
1127 return hba->mcq_enabled; in is_mcq_enabled()
1133 return hba->sg_entry_size; in ufshcd_sg_entry_size()
1139 hba->sg_entry_size = sg_entry_size; in ufshcd_set_sg_entry_size()
1159 return hba->caps & UFSHCD_CAP_CLK_GATING; in ufshcd_is_clkgating_allowed()
1163 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; in ufshcd_can_hibern8_during_gating()
1167 return hba->caps & UFSHCD_CAP_CLK_SCALING; in ufshcd_is_clkscaling_supported()
1171 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND; in ufshcd_can_autobkops_during_suspend()
1175 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND; in ufshcd_is_rpm_autosuspend_allowed()
1180 return (hba->caps & UFSHCD_CAP_INTR_AGGR) && in ufshcd_is_intr_aggr_allowed()
1181 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR); in ufshcd_is_intr_aggr_allowed()
1187 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE)); in ufshcd_can_aggressive_pc()
1192 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) && in ufshcd_is_auto_hibern8_supported()
1193 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8); in ufshcd_is_auto_hibern8_supported()
1198 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit); in ufshcd_is_auto_hibern8_enabled()
1203 return hba->caps & UFSHCD_CAP_WB_EN; in ufshcd_is_wb_allowed()
1208 return hba->caps & UFSHCD_CAP_WB_WITH_CLK_SCALING; in ufshcd_enable_wb_if_scaling_up()
1212 writel((val), (hba)->mcq_base + (reg))
1214 readl((hba)->mcq_base + (reg))
1217 writel_relaxed((val), (hba)->mcq_base + (reg))
1219 readl_relaxed((hba)->mcq_base + (reg))
1222 writel((val), (hba)->mmio_base + (reg))
1224 readl((hba)->mmio_base + (reg))
1227 * ufshcd_rmwl - perform read/modify/write for a controller register
1229 * @mask: mask to apply on read value
1272 * ufshcd_set_variant - set variant specific data to the hba
1279 hba->priv = variant; in ufshcd_set_variant()
1283 * ufshcd_get_variant - get variant specific data from the hba
1289 return hba->priv; in ufshcd_get_variant()
1363 return (pwr_info->pwr_rx == FAST_MODE || in ufshcd_is_hs_mode()
1364 pwr_info->pwr_rx == FASTAUTO_MODE) && in ufshcd_is_hs_mode()
1365 (pwr_info->pwr_tx == FAST_MODE || in ufshcd_is_hs_mode()
1366 pwr_info->pwr_tx == FASTAUTO_MODE); in ufshcd_is_hs_mode()
1407 if (hba->vops && hba->vops->init) in ufshcd_vops_init()
1408 return hba->vops->init(hba); in ufshcd_vops_init()
1415 if (hba->vops && hba->vops->phy_initialization) in ufshcd_vops_phy_initialization()
1416 return hba->vops->phy_initialization(hba); in ufshcd_vops_phy_initialization()