uapi/linux/iommufd.h

1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
23  *  - ENOTTY: The IOCTL number itself is not supported at all
24  *  - E2BIG: The IOCTL number is supported, but the provided structure has
25  *    non-zero in a part the kernel does not understand.
26  *  - EOPNOTSUPP: The IOCTL number is supported, and the structure is
29  *  - EINVAL: Everything about the IOCTL was understood, but a field is not
31  *  - ENOENT: An ID or IOVA provided does not exist.
32  *  - ENOMEM: Out of memory.
33  *  - EOVERFLOW: Mathematics overflowed.
56  * struct iommu_destroy - ioctl(IOMMU_DESTROY)
69  * struct iommu_ioas_alloc - ioctl(IOMMU_IOAS_ALLOC)
75  * to memory mapping.
85  * struct iommu_iova_range - ioctl(IOMMU_IOVA_RANGE)
97  * struct iommu_ioas_iova_ranges - ioctl(IOMMU_IOAS_IOVA_RANGES)
103  * @out_iova_alignment: Minimum alignment required for mapping IOVA
105  * Query an IOAS for ranges of allowed IOVAs. Mapping IOVA outside these ranges
114  * for mapping.
117  * the total number of iovas filled in. The ioctl will return -EMSGSIZE and set
119  * caller should allocate a larger output array and re-issue the ioctl.
141  * struct iommu_ioas_allow_iovas - ioctl(IOMMU_IOAS_ALLOW_IOVAS)
173  * enum iommufd_ioas_map_flags - Flags for map and copy
175  *                             IOVA to place the mapping at
176  * @IOMMU_IOAS_MAP_WRITEABLE: DMA is allowed to write to this mapping
177  * @IOMMU_IOAS_MAP_READABLE: DMA is allowed to read from this mapping
186  * struct iommu_ioas_map - ioctl(IOMMU_IOAS_MAP)
189  * @ioas_id: IOAS ID to change the mapping of
191  * @user_va: Userspace pointer to start mapping from
193  * @iova: IOVA the mapping was placed at. If IOMMU_IOAS_MAP_FIXED_IOVA is set
196  * Set an IOVA mapping from a user pointer. If FIXED_IOVA is specified then the
197  * mapping will be established at iova, otherwise a suitable location based on
216  * struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY)
219  * @dst_ioas_id: IOAS ID to change the mapping of
222  * @dst_iova: IOVA the mapping was placed at. If IOMMU_IOAS_MAP_FIXED_IOVA is
226  * Copy an already existing mapping from src_ioas_id and establish it in
231  * kind of 'cache' to speed up mapping. Copy has an efficiency advantage over
247  * struct iommu_ioas_unmap - ioctl(IOMMU_IOAS_UNMAP)
249  * @ioas_id: IOAS ID to change the mapping of
267  * enum iommufd_option - ioctl(IOMMU_OPTION_RLIMIT_MODE) and
276  *    PAGE_SIZE. This can be useful for benchmarking.  This is a per-IOAS
285  * enum iommufd_option_ops - ioctl(IOMMU_OPTION_OP_SET) and
296  * struct iommu_option - iommu option multiplexer
319  * enum iommufd_vfio_ioas_op - IOMMU_VFIO_IOAS_* ioctls
331  * struct iommu_vfio_ioas - ioctl(IOMMU_VFIO_IOAS)
343  * this ioctl. SET or CLEAR does not destroy any auto-created IOAS.
354  * enum iommufd_hwpt_alloc_flags - Flags for HWPT allocation
366  * enum iommu_hwpt_vtd_s1_flags - Intel VT-d stage-1 page table
379  * struct iommu_hwpt_vtd_s1 - Intel VT-d stage-1 page table
382  * @pgtbl_addr: The base address of the stage-1 page table.
383  * @addr_width: The address width of the stage-1 page table
394  * enum iommu_hwpt_data_type - IOMMU HWPT Data Type
395  * @IOMMU_HWPT_DATA_NONE: no data
396  * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
404  * struct iommu_hwpt_alloc - ioctl(IOMMU_HWPT_ALLOC)
412  * @data_len: Length of the type specific data
413  * @data_uptr: User pointer to the type specific data
419  * A kernel-managed HWPT will be created with the mappings from the given
424  * A user-managed nested HWPT will be created from a given parent HWPT via
427  * must be set to a pre-defined type corresponding to an I/O page table
448  * enum iommu_hw_info_vtd_flags - Flags for VT-d hw_info
449  * @IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17: If set, disallow read-only mappings
451 …                 https://www.intel.com/content/www/us/en/content-details/772415/content-details.ht…
458  * struct iommu_hw_info_vtd - Intel VT-d hardware information
463  * @cap_reg: Value of Intel VT-d capability register defined in VT-d spec
465  * @ecap_reg: Value of Intel VT-d capability register defined in VT-d spec
468  * User needs to understand the Intel VT-d specification to decode the
479  * enum iommu_hw_info_type - IOMMU Hardware Info Types
482  * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
504  * struct iommu_hw_info - ioctl(IOMMU_GET_HW_INFO)
509  *            data that kernel supports
510  * @data_uptr: User pointer to a user-space buffer used by the kernel to fill
511  *             the iommu type specific hardware information data
518  * Query an iommu type specific hardware information data from an iommu behind
519  * a given device that has been bound to iommufd. This hardware info data will
522  * a guest stage-1 page table can be compatible with the physical iommu.
524  * To capture an iommu type specific hardware information data, @data_uptr and
526  * user buffer is larger than the data that kernel has. Otherwise, kernel only
529  * @out_data_type will be filled to decode the data filled in the buffer
545  * enum iommufd_hwpt_set_dirty_tracking_flags - Flags for steering dirty
554  * struct iommu_hwpt_set_dirty_tracking - ioctl(IOMMU_HWPT_SET_DIRTY_TRACKING)
572  * enum iommufd_hwpt_get_dirty_bitmap_flags - Flags for getting dirty bits
585  * struct iommu_hwpt_get_dirty_bitmap - ioctl(IOMMU_HWPT_GET_DIRTY_BITMAP)
593  * @data: bitmap where to set the dirty bits. The bitmap bits each
598  *  data[(iova / page_size) / 64] & (1ULL << ((iova / page_size) % 64))
612 	__aligned_u64 data;  member
618  * enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation
619  *                                        Data Type
620  * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
627  * enum iommu_hwpt_vtd_s1_invalidate_flags - Flags for Intel VT-d
628  *                                           stage-1 cache invalidation
630  *                            to all-levels page structure cache or just
638  * struct iommu_hwpt_vtd_s1_invalidate - Intel VT-d cache invalidation
646  * The Intel VT-d specific invalidation data for user-managed stage-1 cache
648  * tell the impacted cache scope after modifying the stage-1 page table.
663  * struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE)
666  * @data_uptr: User pointer to an array of driver-specific cache invalidation
667  *             data.
668  * @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the data
676  * Invalidate the iommu cache for user-managed page table. Modifications on a
677  * user-managed page table should be followed by this operation to sync cache.