Lines Matching +full:host +full:- +full:wake
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2002 by David Brownell
9 #include <linux/usb/ehci-dbgp.h>
13 /* Section 2.2 Host Controller Capability Registers */
17 * some hosts treat caplength and hciversion as parts of a 32-bit
26 u32 hcs_params; /* HCSPARAMS - offset 0x4 */
34 #define HCS_N_PORTS_MAX 15 /* N_PORTS valid 0x1-0xF */
36 u32 hcc_params; /* HCCPARAMS - offset 0x8 */
48 #define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */
49 u8 portroute[8]; /* nibbles for routing - offset 0xC */
53 /* Section 2.3 Host Controller Operational Registers */
60 #define CMD_HIRD (0xf<<24) /* host initiated resume duration */
78 #define STS_PPCE_MASK (0xff<<16) /* Per-Port change event 1-16 */
128 #define PORT_WKOC_E (1<<22) /* wake on overcurrent (enable) */
129 #define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */
130 #define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */
133 #define PORT_TEST_PKT PORT_TEST(0x4) /* Port Test Control - packet test */
134 #define PORT_TEST_FORCE PORT_TEST(0x5) /* Port Test Control - force enable */
162 #define USBMODE_CM_HC (3<<0) /* host controller mode */
166 /* Moorestown has some non-standard registers, partially due to the fact that
179 /* Broadcom-proprietary USB_EHCI_INSNREG00 @ 0x80 */
188 #define USBMODE_EX_HC (3<<0) /* host controller mode */