Lines Matching +full:g +full:- +full:link

1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
37 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
38 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
109 * ACE2.x definitions for SHIM registers - only accessible when the
110 * HDAudio extended link LCTL.SPA/CPA = 1.
112 /* x variable is link index */
118 /* Read-only capabilities */
120 #define SDW_SHIM2_LECAP_HDS BIT(0) /* unset -> Host mode */
125 #define SDW_SHIM2_PCMSCAP_ISS GENMASK(3, 0) /* Input-only streams */
126 #define SDW_SHIM2_PCMSCAP_OSS GENMASK(7, 4) /* Output-only streams */
129 /* Read-only PCM Stream Channel Count, y variable is stream */
140 /* SHIM2 vendor-specific registers */
181 * the @params_stream callback, e.g. for interaction with DSP
194 * the @free_stream callback, e.g. for interaction with DSP
216 * struct sdw_intel_acpi_info - Soundwire Intel information found in ACPI tables
218 * @count: link count found with "sdw-master-count" property
219 * @link_mask: bit-wise mask listing links enabled by BIOS menu
221 * this structure could be expanded to e.g. provide all the _ADR
233 /* Intel clock-stop/pm_runtime quirk definitions */
244 * reset and re-enumeration will be performed when the bus
246 * in-band wakes.
252 * (e.g. speaker amplifiers). The clock-stop mode is typically
253 * slightly higher power than when the IP is completely powered-off.
258 * Require a bus reset (and complete re-enumeration) when exiting
262 * e.g. to provide the reasons for the wake, report acoustic events or
270 * struct sdw_intel_ctx - context allocated by the controller
272 * @count: link count
275 * @link_mask: bit-wise mask listing SoundWire links reported by the
279 * @ldev: information for each link (controller-specific and kept
305 * struct sdw_intel_res - Soundwire Intel global resource structure,
309 * @count: link count
316 * @link_mask: bit-wise mask listing links selected by the DSP driver
318 * machine-specific quirks are handled in the DSP driver.
323 * @ext: extended HDaudio link support
325 * @eml_lock: mutex protecting shared registers in the HDaudio multi-link
355 * on e.g. which machine driver to select (I2S mode, HDaudio or
376 /* struct intel_sdw_hw_ops - SoundWire ops for Intel platforms.
385 * @link_power_up: power-up using chip-specific helpers
386 * @link_power_down: power-down with chip-specific helpers
388 * @shim_wake: enable/disable in-band wake management
391 * @sync_arm: helper for multi-link synchronization
392 * @sync_go_unlocked: helper for multi-link synchronization -
394 * @sync_go: helper for multi-link synchronization
395 * @sync_check_cmdsync_unlocked: helper for multi-link synchronization
396 * and bank switch - shim_lock is assumed to be locked at higher level
432 * IDA min selected to allow for 5 unconstrained devices per link,
433 * and 6 system-unique Device Numbers for wake-capable devices.