1 /* SPDX-License-Identifier: GPL-2.0 */
3  * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
15  * @GENI_SE_FIFO: FIFO mode. Data is transferred with SE FIFO
18  * with SE by DMAengine internal to SE
31 /* Protocols supported by GENI Serial Engines */
56  * struct geni_se - GENI Serial Engine
63  * @icc_paths:		Array of ICC paths for SE
75 /* Common SE registers */
286 /* QUP SE VERSION value for major number 2 and minor number 5 */
292  * by the hardware team, and are not dynamically scaled with GENI bandwidth
306 u32 geni_se_get_qup_hw_version(struct geni_se *se);
309  * geni_se_read_proto() - Read the protocol configured for a serial engine
310  * @se:		Pointer to the concerned serial engine.
314 static inline u32 geni_se_read_proto(struct geni_se *se)  in geni_se_read_proto()  argument
318 	val = readl_relaxed(se->base + GENI_FW_REVISION_RO);  in geni_se_read_proto()
324  * geni_se_setup_m_cmd() - Setup the primary sequencer
325  * @se:		Pointer to the concerned serial engine.
332 static inline void geni_se_setup_m_cmd(struct geni_se *se, u32 cmd, u32 params)  in geni_se_setup_m_cmd()  argument
337 	writel(m_cmd, se->base + SE_GENI_M_CMD0);  in geni_se_setup_m_cmd()
341  * geni_se_setup_s_cmd() - Setup the secondary sequencer
342  * @se:		Pointer to the concerned serial engine.
349 static inline void geni_se_setup_s_cmd(struct geni_se *se, u32 cmd, u32 params)  in geni_se_setup_s_cmd()  argument
353 	s_cmd = readl_relaxed(se->base + SE_GENI_S_CMD0);  in geni_se_setup_s_cmd()
357 	writel(s_cmd, se->base + SE_GENI_S_CMD0);  in geni_se_setup_s_cmd()
361  * geni_se_cancel_m_cmd() - Cancel the command configured in the primary
363  * @se:	Pointer to the concerned serial engine.
368 static inline void geni_se_cancel_m_cmd(struct geni_se *se)  in geni_se_cancel_m_cmd()  argument
370 	writel_relaxed(M_GENI_CMD_CANCEL, se->base + SE_GENI_M_CMD_CTRL_REG);  in geni_se_cancel_m_cmd()
374  * geni_se_cancel_s_cmd() - Cancel the command configured in the secondary
376  * @se:	Pointer to the concerned serial engine.
381 static inline void geni_se_cancel_s_cmd(struct geni_se *se)  in geni_se_cancel_s_cmd()  argument
383 	writel_relaxed(S_GENI_CMD_CANCEL, se->base + SE_GENI_S_CMD_CTRL_REG);  in geni_se_cancel_s_cmd()
387  * geni_se_abort_m_cmd() - Abort the command configured in the primary sequencer
388  * @se:	Pointer to the concerned serial engine.
393 static inline void geni_se_abort_m_cmd(struct geni_se *se)  in geni_se_abort_m_cmd()  argument
395 	writel_relaxed(M_GENI_CMD_ABORT, se->base + SE_GENI_M_CMD_CTRL_REG);  in geni_se_abort_m_cmd()
399  * geni_se_abort_s_cmd() - Abort the command configured in the secondary
401  * @se:	Pointer to the concerned serial engine.
406 static inline void geni_se_abort_s_cmd(struct geni_se *se)  in geni_se_abort_s_cmd()  argument
408 	writel_relaxed(S_GENI_CMD_ABORT, se->base + SE_GENI_S_CMD_CTRL_REG);  in geni_se_abort_s_cmd()
412  * geni_se_get_tx_fifo_depth() - Get the TX fifo depth of the serial engine
414  * @se: Pointer to the concerned serial engine.
421 static inline u32 geni_se_get_tx_fifo_depth(struct geni_se *se)  in geni_se_get_tx_fifo_depth()  argument
425 	hw_version = geni_se_get_qup_hw_version(se);  in geni_se_get_tx_fifo_depth()
434 	val = readl_relaxed(se->base + SE_HW_PARAM_0);  in geni_se_get_tx_fifo_depth()
440  * geni_se_get_tx_fifo_width() - Get the TX fifo width of the serial engine
441  * @se:	Pointer to the concerned serial engine.
448 static inline u32 geni_se_get_tx_fifo_width(struct geni_se *se)  in geni_se_get_tx_fifo_width()  argument
452 	val = readl_relaxed(se->base + SE_HW_PARAM_0);  in geni_se_get_tx_fifo_width()
458  * geni_se_get_rx_fifo_depth() - Get the RX fifo depth of the serial engine
460  * @se: Pointer to the concerned serial engine.
467 static inline u32 geni_se_get_rx_fifo_depth(struct geni_se *se)  in geni_se_get_rx_fifo_depth()  argument
471 	hw_version = geni_se_get_qup_hw_version(se);  in geni_se_get_rx_fifo_depth()
480 	val = readl_relaxed(se->base + SE_HW_PARAM_1);  in geni_se_get_rx_fifo_depth()
485 void geni_se_init(struct geni_se *se, u32 rx_wm, u32 rx_rfr);
487 void geni_se_select_mode(struct geni_se *se, enum geni_se_xfer_mode mode);
489 void geni_se_config_packing(struct geni_se *se, int bpw, int pack_words,
492 int geni_se_resources_off(struct geni_se *se);
494 int geni_se_resources_on(struct geni_se *se);
496 int geni_se_clk_tbl_get(struct geni_se *se, unsigned long **tbl);
498 int geni_se_clk_freq_match(struct geni_se *se, unsigned long req_freq,
502 void geni_se_tx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len);
504 int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len,
507 void geni_se_rx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len);
509 int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len,
512 void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
514 void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
516 int geni_icc_get(struct geni_se *se, const char *icc_ddr);
518 int geni_icc_set_bw(struct geni_se *se);
519 void geni_icc_set_tag(struct geni_se *se, u32 tag);
521 int geni_icc_enable(struct geni_se *se);
523 int geni_icc_disable(struct geni_se *se);