1 /* SPDX-License-Identifier: GPL-2.0 */
42  * Enqueue a llist_node on the call_single_queue; be very careful, read
51 			     int wait);
54 			   void *info, bool wait, const struct cpumask *mask);
60  * Architecture-dependent code may override them.
67  * Call a function on all processors
69 static inline void on_each_cpu(smp_call_func_t func, void *info, int wait)  in on_each_cpu()  argument
71 	on_each_cpu_cond_mask(NULL, func, info, wait, cpu_online_mask);  in on_each_cpu()
75  * on_each_cpu_mask(): Run a function on processors specified by
77  * @mask: The set of cpus to run on (only runs on online subset).
78  * @func: The function to run. This must be fast and non-blocking.
80  * @wait: If true, wait (atomically) until function has completed
81  *        on other CPUs.
83  * If @wait is true, then returns once @func has returned.
91 				    smp_call_func_t func, void *info, bool wait)  in on_each_cpu_mask()  argument
93 	on_each_cpu_cond_mask(NULL, func, info, wait, mask);  in on_each_cpu_mask()
97  * Call a function on each processor for which the supplied function
103 				    smp_call_func_t func, void *info, bool wait)  in on_each_cpu_cond()  argument
105 	on_each_cpu_cond_mask(cond_func, func, info, wait, cpu_online_mask);  in on_each_cpu_cond()
116  * main cross-CPU interfaces, handles INIT, TLB flush, STOP, etc.
131  * callsite IP should be sufficient for root-causing IPIs sent from here.
154  * Call a function on all other processors
156 void smp_call_function(smp_call_func_t func, void *info, int wait);
158 			    smp_call_func_t func, void *info, bool wait);
161 			  smp_call_func_t func, void *info, int wait);
176  * printk() and can access its per-cpu storage.
202 #define smp_call_function(func, info, wait) \  argument
207 #define smp_call_function_many(mask, func, info, wait) \  argument
213 		      void *info, int wait)  in smp_call_function_any()  argument
215 	return smp_call_function_single(0, func, info, wait);  in smp_call_function_any()
236  * raw_processor_id() - get the current (unstable) CPU id
243  * smp_processor_id() - get the current (stable) CPU id
250  *  - IRQs are disabled;
251  *  - preemption is disabled;
252  *  - the task is CPU affine.
259  * Allow the architecture to differentiate between a stable and unstable read.
260  * For example, x86 uses an IRQ-safe asm-volatile read for the unstable but a
261  * regular asm read for the stable.
278  * Callback to arch code if there's nosmp or maxcpus=0 on the