Lines Matching +full:wait +full:- +full:on +full:- +full:read

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 	/* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
36 	u32 cs_rd_off;		/* Read deassertion time */
41 	u32 adv_rd_off;		/* Read deassertion time */
44 	u32 adv_aad_mux_rd_off;	/* ADV read deassertion time for AAD */
59 	u32 access;		/* Start-cycle to first data valid delay */
60 	u32 rd_cycle;		/* Total read cycle time */
69 	/* The following are only on OMAP3430 */
95 	u32 t_rd_cycle;	/* read cycle time */
96 	u32 t_cez_r;	/* read CS deassertion to high Z */
113 	u32 t_ce_avd;	/* CS on to ADV on delay */
118 	u8 cyc_aavdh_oe;/* read address hold time in cycles */
134 #define GPMC_DEVWIDTH_8BIT		1	/* 8-bit device width */
135 #define GPMC_DEVWIDTH_16BIT		2	/* 16-bit device width */
136 #define GPMC_MUX_AAD			1	/* Addr-Addr-Data multiplex */
137 #define GPMC_MUX_AD			2	/* Addr-Data multiplex */
139 /* Wait pin polarity values */
148 	bool burst_read;	/* enables read page/burst mode */
153 	bool wait_on_read;	/* monitor wait on reads */
154 	bool wait_on_write;	/* monitor wait on writes */
158 	u32 wait_pin;		/* wait-pin to be used */