Lines Matching +full:timeout +full:- +full:minutes

1 /* SPDX-License-Identifier: GPL-2.0 */
5  * Copyright (C) 2018-2020 Intel Corporation, Inc.
101 /* interval 100ms and timeout 5s */
105 /* RSU PREP Timeout (2 minutes) to erase flash staging area */
109 /* RSU Complete Timeout (40 minutes) for full flash update */
188  * struct m10bmc_csr_map - Intel MAX 10 BMC CSR register map
211  * struct intel_m10bmc_platform_info - Intel MAX 10 BMC platform specific information
229  * struct intel_m10bmc_flash_bulk_ops - device specific operations for flash R/W
236  * is locked, @read returns -EBUSY.
253  * struct intel_m10bmc - Intel MAX 10 BMC parent driver data structure
274  * m10bmc_raw_read - read m10bmc register per addr
275  * m10bmc_sys_read - read m10bmc system register per offset
276  * m10bmc_sys_update_bits - update m10bmc system register per offset
284 	ret = regmap_read(m10bmc->regmap, addr, val);  in m10bmc_raw_read()
286 		dev_err(m10bmc->dev, "fail to read raw reg %x: %d\n",  in m10bmc_raw_read()